Annealing of high-k dielectric materials

A method for fabricating a transistor having a high dielectric constant (high-k) gate dielectric layer, comprising:

• forming a high-k gate dielectric layer on a substrate;
• and
• annealing the substrate and high-k gate dielectric layer, the annealing comprising:
• placing the substrate and high-k gate dielectric layer in an ambient comprising hydrogen gas and an oxidizing gas;
• and
• heating the high-k gate dielectric layer to a temperature greater than 650° C. while the gate dielectric layer is in the ambient, the ambient preventing or reducing the formation of lower dielectric constant (lower-k) material between the high-k gate dielectric layer and the substrate.

A method for fabricating a transistor having a high dielectric constant (high-k) gate dielectric layer, comprising:

• forming a high-k gate dielectric layer on a substrate;
• and
• annealing the substrate and high-k gate dielectric layer, the annealing comprising:
• placing the substrate and high-k gate dielectric layer in an ambient comprising nitrous oxide gas;
• and
• heating the high-k gate dielectric layer to a temperature greater than 650° C. while the gate dielectric layer is in the ambient, the ambient preventing or reducing the formation of lower dielectric constant (lower-k) material between the high-k gate dielectric layer and the substrate.

A method for fabricating a transistor having a high dielectric constant (high-k) gate dielectric layer, comprising:

• forming a high-k gate dielectric layer on a substrate;
• and
• annealing the substrate and high-k gate dielectric layer, the annealing comprising:
• placing the substrate and high-k gate dielectric layer in an ambient comprising chemically active oxygen gas, each transistor comprising a high-k gate dielectric layer coupled to a substrate;
• and
• heating the high-k gate dielectric layer to a temperature less than 4000° C. or between 450-600° C. while the gate dielectric layer is in the ambient, the ambient preventing or reducing the formation of lower dielectric constant (lower-k) material between the high-k gate dielectric layer and the substrate.