Operational amplifier including a right-half plane zero reduction circuit and related method
AssigneeIntersil Americas Inc.
InventorBruce J. Tesch
Life of this patent
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AssigneeIntersil Americas Inc.
InventorBruce J. Tesch
Estimating the term…
An operational amplifier includes at least one bias current generator, a first gain stage connected to the at least one bias current generator and defining inputs for the operational amplifier, and a second gain stage. The second gain stage may be connected to the at least one bias current generator. Moreover, the second gain stage may be driven by the first gain stage and define an output for the operational amplifier. The operational amplifier may further include at least one capacitive element connected between the first gain stage and the output. Additionally, a circuit element having a controllable conductance may be connected between the at least one capacitive element and the first gain stage. A control circuit may also be included for controlling the circuit element so that the conductance thereof substantially matches a transconductance of the second gain stage.
An operational amplifier comprising:
A complementary metal oxide semiconductor (CMOS) operational amplifier comprising:
A method for reducing a right half plane (RHP) zero at an output of an operational amplifier comprising at least one bias current generator, a first gain stage connected to the the at least one bias current generator and defining inputs for the operational amplifier, a second gain stage connected to the at least one bias current generator being driven by the first gain stage and defining an output for the operational amplifier, and at least one capacitive element connected between the first gain stage and the output, the method comprising:
Dependencies are inferred from the claim text.