Electro-optical device and manufacturing method thereof
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorShunpei Yamazaki
Life of this patent
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Abstract
An electro-optical device having high operation performance and reliability, and a manufacturing method thereof. A TFT structure which is strong agains hot carrier injection is realized by disposing a Lov region 207 in an n-channel TFT 203 which forms a driver circuit. Further, Loff regions 217 to 220 and offset region are disposed in an n-channel TFT 304 which forms a pixel section, and a TFT structure of low OFF current value is realized. Further, by reducing the n-type impurity element contained in Loff regions 217 to 220 to approximately 1×1016 to 5×1018 atoms/cm3, further reduction of OFF current can be performed.
Claims29
An electro-optical device comprising a pixel section and a driver circuit over a same substrate,
- wherein the driver circuit comprises a first n-channel TFT in which all of a LDD region is formed to overlap a gate wiring by interposing a gate insulating film and a second n-channel TFT in which a part of a LDD region is formed to overlap a gate wiring by interposing a gate insulating film;
- a LDD region of a pixel TFT which comprises the pixel section is formed so as not to overlap a gate wiring of the pixel TFT by interposing a gate insulating film;
- an offset region is formed between a channel forming region and a LDD region of the pixel TFT;
- and
- a LDD region formed in the first n-channel TFT is formed between a drain region and a channel forming region of the first n-channel TFT, and LDD regions formed in the second n-channel TFT are formed to sandwich a channel forming region of the second n-channel TFT.
An electro-optical device comprising a pixel section and a driver circuit over a same substrate,
- wherein the driver circuit comprises a first n-channel TFT in which all of a LDD region is formed to overlap a gate wiring by interposing a gate insulating film and a second n-channel TFT in which a part of a LDD region is formed to overlap a gate wiring by interposing a gate insulating film;
- wherein a LDD region of a pixel TFT which comprises the pixel section is formed so as not to overlap a gate wiring of the pixel TFT by interposing a gate insulating film;
- wherein a storage capacitor of the pixel section comprises a shielding film disposed on an organic resin film, an oxide of the shielding film and a pixel electrode;
- wherein an offset region is formed between a channel forming region and a LDD region of the pixel TFT, and
- wherein a LDD region formed in the first n-channel TFT is formed between a drain region and a channel forming region of the first n-channel TFT, and LDD regions formed in the second n-channel TFT are formed to sandwich a channel forming region of the second n-channel TFT.
An electric device comprising:
- at least one first thin film transistor formed over a substrate and electrically connected to a pixel electrode, said first thin film transistor comprising:
- a semiconductor layer having a pair of impurity regions and a channel region extending therebetween;
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, and
- a pair of LDD regions between the channel region and the pair of impurity regions,
- a driver circuit formed over the substrate for driving said at least one first thin film transistor, said driver circuit including at least a second n-channel TFT and a third n-channel TFT,
- wherein said second n-channel TFT comprises:
- a semiconductor layer having source and drain regions and a channel region therebetween, and an LDD region interposed between the channel region and the drain region while the source region is contiguous to the channel region;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode overlaps an entire portion of the LDD region, and
- wherein said third n-channel TFT comprises:
- a semiconductor layer having a pair of impurity regions and a channel region therebetween, and a pair of LDD regions interposed between the channel region and the pair of impurity regions;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode partly overlaps the pair of LDD regions.
An electric device comprising:
- at least one first thin film transistor formed over a substrate and electrically connected to a pixel electrode, said first thin film transistor comprising:
- a semiconductor layer having a pair of impurity regions and a channel region extending therebetween;
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, and
- a pair of LDD regions between the channel region and the pair of impurity regions,
- an interlayer insulating film comprising an organic resin formed over the first thin film transistor;
- a storage capacitor electrically connected to the pixel electrode, said storage capacitor comprising:
- a shielding film formed over the interlayer insulating film;
- a portion of the pixel electrode overlapping the shielding film with a dielectric film interposed therebetween wherein the dielectric film comprises an oxide of a material of the shielding film,
- a driver circuit formed over the substrate for driving said at least one first thin film transistor, said driver circuit including at least a second n-channel TFT and a third n-channel TFT,
- wherein said second n-channel TFT comprises:
- a semiconductor layer having source and drain regions and a channel region therebetween, and an LDD region interposed between the channel region and the drain region while the source region is contiguous to the channel region;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode overlaps an entire portion of the LDD region, and
- wherein said third n-channel TFT comprises:
- a semiconductor layer having a pair of impurity regions and a channel region therebetween, and a pair of LDD regions interposed between the channel region and the pair of impurity regions;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode partly overlaps the pair of LDD regions.
An electric device comprising:
- at least one first thin film transistor formed over a substrate and electrically connected to a pixel electrode, said first thin film transistor comprising:
- a semiconductor layer having a pair of impurity regions and a channel region extending therebetween;
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, and
- a pair of LDD regions between the channel region and the pair of impurity regions,
- a driver circuit formed over the substrate for driving said at least one first thin film transistor, said driver circuit including at least a second n-channel TFT and a third n-channel TFT,
- wherein said second n-channel TFT comprises:
- a semiconductor layer having source and drain regions and a channel region therebetween, and an LDD region interposed between the channel region and the drain region while the source region is contiguous to the channel region;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode overlaps an entire portion of the LDD region, and
- wherein said third n-channel TFT comprises:
- a semiconductor layer having a pair of impurity regions and a channel region therebetween, and a pair of LDD regions interposed between the channel region and the pair of impurity regions;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode partly overlaps the pair of LDD regions,
- wherein said third n-channel TFT is a part of a sampling circuit of the driver circuit.
An electric device comprising:
- at least one first thin film transistor formed over a substrate and electrically connected to a pixel electrode, said first thin film transistor comprising:
- a semiconductor layer having a pair of impurity regions and a channel region extending therebetween;
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, and
- a pair of LDD regions between the channel region and the pair of impurity regions,
- a driver circuit formed over the substrate for driving said at least one first thin film transistor, said driver circuit including at least a second n-channel TFT and a third n-channel TFT,
- wherein said second n-channel TFT comprises:
- a semiconductor layer having source and drain regions and a channel region therebetween, and an LDD region interposed between the channel region and the drain region while the source region is contiguous to the channel region;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode overlaps an entire portion of the LDD region, and
- wherein said third n-channel TFT comprises:
- a semiconductor layer having a pair of impurity regions and a channel region therebetween, and a pair of LDD regions interposed between the channel region and the pair of impurity regions;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode partly overlaps the pair of LDD regions,
- wherein said second n-channel TFT is a part of at least one of a shift register, a frequency dividing circuit, a signal splitting circuit, a level shifter or a buffer circuit of the driver circuit.
An organic electroluminescence display device comprising:
- at least one first thin film transistor provided at each pixel, said first thin film transistor comprising:
- a semiconductor layer formed over a substrate and having a pair of impurity regions and a channel region extending therebetween;
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, and
- a pair of LDD regions between the channel region and the pair of impurity regions,
- an organic electroluminescence layer provided over the substrate;
- a driver circuit formed over the substrate for driving said at least one first thin film transistor, said driver circuit including at least a second n-channel TFT and a third n-channel TFT,
- wherein said second n-channel TFT comprises:
- a semiconductor layer having source and drain regions and a channel region therebetween, and an LDD region interposed between the channel region and the drain region while the source region is contiguous to the channel region;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode overlaps an entire portion of the LDD region, and
- wherein said third n-channel TFT comprises:
- a semiconductor layer having a pair of impurity regions and a channel region therebetween, and a pair of LDD regions interposed between the channel region and the pair of impurity regions;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode partly overlaps the pair of LDD regions.
An organic electroluminescence display device comprising:
- at least one first thin film transistor provided at each pixel, said first thin film transistor comprising:
- a semiconductor layer formed over a substrate and having a pair of impurity regions and a channel region extending therebetween;
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, and
- a pair of LDD regions between the channel region and the pair of impurity regions,
- an interlayer insulating film comprising an organic resin formed over the first thin film transistor;
- an organic electroluminescence layer formed over the substrate;
- a storage capacitor electrically connected to the pixel electrode, said storage capacitor comprising:
- a shielding film formed over the interlayer insulating film;
- a portion of the pixel electrode overlapping the shielding film with a dielectric film interposed therebetween wherein the dielectric film comprises an oxide of a material of the shielding film,
- a driver circuit formed over the substrate for driving said at least one first thin film transistor, said driver circuit including at least a second n-channel TFT and a third n-channel TFT,
- wherein said second n-channel TFT comprises:
- a semiconductor layer having source and drain regions and a channel region therebetween, and an LDD region interposed between the channel region and the drain region while the source region is contiguous to the channel region;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode overlaps an entire portion of the LDD region, and
- wherein said third n-channel TFT comprises:
- a semiconductor layer having a pair of impurity regions and a channel region therebetween, and a pair of LDD regions interposed between the channel region and the pair of impurity regions;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode partly overlaps the pair of LDD regions.
An organic electroluminescence display device comprising:
- at least one first thin film transistor provided at each pixel, said first thin film transistor comprising:
- a semiconductor layer formed over a substrate and having a pair of impurity regions and a channel region extending therebetween;
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, and
- a pair of LDD regions between the channel region and the pair of impurity regions,
- an organic electroluminescence layer formed over the substrate;
- a driver circuit formed over the substrate for driving said at least one first thin film transistor, said driver circuit including at least a second n-channel TFT and a third n-channel TFT,
- wherein said second n-channel TFT comprises:
- a semiconductor layer having source and drain regions and a channel region therebetween, and an LDD region interposed between the channel region and the drain region while the source region is contiguous to the channel region;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode overlaps an entire portion of the LDD region, and
- wherein said third n-channel TFT comprises:
- a semiconductor layer having a pair of impurity regions and a channel region therebetween, and a pair of LDD regions interposed between the channel region and the pair of impurity regions;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode partly overlaps the pair of LDD regions,
- wherein said third n-channel TFT is a part of a sampling circuit of the driver circuit.
An electroluminescence display device comprising:
- at least one first thin film transistor provided at each pixel, said first thin film transistor comprising:
- a semiconductor layer formed over a substrate and having a pair of impurity regions and a channel region extending therebetween;
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, and
- a pair of LDD regions between the channel region and the pair of impurity regions,
- an organic electroluminescence layer formed over the substrate;
- a driver circuit formed over the substrate for driving said at least one first thin film transistor, said driver circuit including at least a second n-channel TFT and a third n-channel TFT,
- wherein said second n-channel TFT comprises:
- a semiconductor layer having source and drain regions and a channel region therebetween, and an LDD region interposed between the channel region and the drain region while the source region is contiguous to the channel region;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode overlaps an entire portion of the LDD region, and
- wherein said third n-channel TFT comprises:
- a semiconductor layer having a pair of impurity regions and a channel region therebetween, and a pair of LDD regions interposed between the channel region and the pair of impurity regions;
- and
- a gate electrode adjacent to the channel region with a gate insulating film interposed therebetween, wherein the gate electrode partly overlaps the pair of LDD regions,
- wherein said second n-channel TFT is a part of at least one of a shift register, a frequency dividing circuit, a signal splitting circuit, a level shifter or a buffer circuit of the driver circuit.
Dependencies are inferred from the claim text.