Semiconductor memory device with boosting control circuit and control method

A control method for controlling a semiconductor memory device having a booster circuit that generates a boosted potential in response to an oscillation signal generated by an oscillator circuit, the method comprising the steps of:

• receiving a command and an address;
• decoding the command;
• generating a boosting control signal in response to the decoded command indicating that a word line is to be activated;
• providing charge to a boosted potential node in response to the boosting control signal;
• and
• providing an electrical connection between the boosted potential node and the word line in accordance with the value of the address received.

A semiconductor memory device, comprising:

• a memory cell array having a plurality of word lines;
• a word selection circuit that activates one of the plurality of word lines based on an address value;
• a boosting control circuit coupled to generate a boosting control signal in response to a control signal indicating that a word line is to be activated;
• a boosted potential detection circuit coupled to receive the boosting control signal and provide a boosted voltage signal having an oscillator enable state and an oscillator disable state;
• a boosted potential node coupled to the word selection circuit, the boosted potential node providing charge to the activated word line;
• an oscillation circuit coupled to generate an oscillation signal that has periodic logic transitions when the boosted voltage signal is in the oscillator enable state;
• and
• a booster circuit coupled to provide charge to the boosted potential node in response to logic transitions in the oscillation signal.