Graphics processor with pipeline state storage and retrieval
AssigneeApple Computer, Inc.
InventorsJerome F. Duluk, Jr., Jack Benkual, Shun Wai Go, Sushma S. Trivedi, Richard E. Hessel, Joseph P. Bratt
Life of this patent
Estimating the term…
Loading patent…
AssigneeApple Computer, Inc.
InventorsJerome F. Duluk, Jr., Jack Benkual, Shun Wai Go, Sushma S. Trivedi, Richard E. Hessel, Joseph P. Bratt
Estimating the term…
A deferred graphics pipeline processor comprised of a mode extraction unit and a Polygon Memory associated with the polygon unit. The mode extraction unit receives a data stream from a geometry unit and separates the data stream into vertices data, and non-vertices data which is sent to the Polygon Memory for storage. A mode injection unit receives inputs from the Polygon Memory and communicates the mode information to one or more other processing units. The mode injection unit maintains status information identifying the information that is already cached and not sending information that is already cached, thereby reducing communication bandwidth.
A 3D graphics pipeline for generating a rendered image from a plurality of graphics primitives, the pipeline comprising:
A computing system for 3-D graphics rendering, generating a final rendered image, the system comprising:
A computer program for use in conjunction with a computer system, the computer program comprising a computer program mechanism embedded therein, the computer program mechanism, comprising:
Dependencies are inferred from the claim text.