Oscillator with digitally variable phase for a phase-locked loop

A method of controlling a variable phase in a phase locked loop comprising:

• providing an oscillator having a plurality of phases and a frequency;
• providing a phase selector;
• inputting first and second adjacent phases from the plurality of phases into said phase selector;
• inputting a frequency input into the oscillator for controlling the frequency of the oscillator, the frequency input comprising proportional, integral and differential control;
• and
• controlling a variable phase wherein said phase selector selects a desired phase among said variable phase between said first and second adjacent phases, the phase selector outputting the selected phase whithin a phase locked loop thereby controlling the variable phase within the phase locked loop.

A method of controlling a variable phase in a phase locked loop comprising:

• providing an oscillator having a plurality of phases;
• providing a phase selector;
• providing proportional, integral and differential signals;
• controlling the phase selector with at least one of the above signals;
• inputting a first and second adjacent phases of the plurality of phases into the phase selector;
• controlling a variable phase wherein the phase selector selects a desired phase among the variable phase between the first and second phases, the phase selector outputting the selected phase within a phase locked loop thereby controlling the variable phase within the phase locked loop.

A method of controlling a variable phase in a phase locked loop comprising:

• providing an oscillator having a plurality of phases;
• providing a phase selector;
• inputting first and second adjacent phases of the plurality of phases into the phase selector;
• controlling a variable phase wherein the phase selector selects a desired phase among the variable phase between the first and second adjacent phases, the phase selector outputting the selected phase within a phase locked loop thereby controlling the variable phase within the phase locked loop;
• and
• a write loop aligned to a reference clock and a read loop aligned to a continuous timing data signal, wherein said oscillator exist within both said write and read loops while said phase selector exists within said read loop.

A method of controlling a variable phase in a phase locked loop comprising:

• providing an oscillator having a plurality of phases;
• providing a phase selector having a digitally controlled fine interpolator having 12 states for interpolating phase between first phase and second adjacent phases of the plurality of phases in equally spaced increments comprising 27π96 radians;
• inputting the first phase into the phase selector;
• inputting the second phase into the phase selector;
• and
• controlling a variable phase wherein the phase selector selects a desired phase among the variable phase between the first and second phases, the phase selector outputting the selected phase within a phase locked loop thereby controlling the variable phase within the phase locked loop.

A method of controlling a variable phase in a phase locked loop comprising:

• providing an oscillator having a plurality of phases;
• providing a phase selector;
• inputting first and second adjacent phases of the plurality of phases into the phase selector;
• a phase interpolator comprising first and second current weighted delay having delays substantially inversely proportional to a control current wherein said phase interpolator inputting said first adjacent phase into said first delay stage while inputting said second adjacent phase into said second delay stage, said first and second delay stages sharing a total current such that the digital control input causes a fraction F of the current I to flow to the control input of the first delay stage and a fraction (1−F) of the current I to flow to the control input of the second delay stage;
• and
• controlling a variable phase wherein the phase selector selects a desired phase among the variable phase between the first and second adjacent phases, the phase selector outputting the selected phase within a phase locked loop thereby controlling the variable phase within the phase locked loop.

A phase locked loop for controlling a variable phase comprising:

• an oscillator adapted to provide a plurality of phase outputs;
• a phase selector;
• a first and a second phase output from the plurality of phase outputs, the first and second phases being adjacent phases selected from the oscillator;
• a timing signal;
• a proportional integral controller adapted to generate from the timing signal an oscillator control signal;
• a timing error generated by the oscillator, wherein the first and second phases are adapted to employ the oscillator control signal to generate the timing error, and
• a phase locked loop comprising the oscillator, phase selector, and first and second adjacent phase outputs, adapted to control a variable phase, wherein the phase selector is adapted to output a desired variable phase selected among a variable phase between the first and second adjacent phase outputs, thereby the phase locked loop is adapted to control the variable phase.

A phase locked loop for controlling a variable phase comprising:

• an oscillator adapted to provide a plurality of phase outputs;
• a phase selector;
• a first and second phase output from the plurality of phase outputs, the first and second phase outputs being adjacent phases selected from the oscillator;
• a write loop aligned to a reference clock and a read loop aligned to a continuous timing data signal, wherein the oscillator exists within both the write and read loops while the phase selector exists within the read loop;
• and
• a phase locked loop comprising the oscillator, phase selector, and first and second adjacent phase outputs, adapted to control a variable phase, wherein the phase selector is adapted to output a desired variable phase selected among a variable phase between the first and second adjacent phase outputs, thereby the phase locked loop is adapted to control the variable phase.