US 6,525,593 B1 · Method and apparatus for local and global power management in a programmable analog circuit

Abstract

A method and apparatus for local and global power management in a programmable analog circuit. Specifically, the present invention describes an array of programmable analog blocks. Each block contains current mirror circuits that are coupled in parallel fashion. The mirror circuits function to increase current consumption in a corresponding operational amplifier more current when enabled. Global power management is achieved by increasing and decreasing the bias voltage that is applied to the array. Global configuration bits select the bias voltage value, including electrically disabling the bias voltage from the array of programmable analog blocks. Local power management is provided by enabling or disabling mirror circuits with local configuration bits to adjust the performance in an operational amplifier contained within a corresponding programmable analog block. A microcontroller controls the local and global management of power through the programmable analog block.

Claims24

Dependent claims

A programmable analog circuit having global and local power management comprising:

a first programmable analog block having a first plurality of mirror circuits coupled in parallel for adjusting performance of said first programmable analog block, including a first mirror circuit;
a bias voltage for biasing said first programmable analog block;
a plurality of global configuration bits for increasing said bias voltage for adjusting performance of said first programmable analog block;
and
a first plurality of local configuration bits for controlling said first plurality of mirror circuits for adjusting performance of said first programmable analog block.

2 more elements

A programmable analog circuit having global and local power management comprising:

an array of programmable analog blocks that are coupled in parallel, including a first programmable analog block and a second programmable analog block;
said first programmable analog block including a first plurality of mirror circuits that are coupled in parallel for adjusting performance of said first programmable analog block, said first programmable analog block including a first operational amplifier, said first programmable analog block controlled by a first plurality of local configuration bits for selectively cutting in and removing mirror circuits in said first plurality of mirror circuits;
said second programmable analog block including a second plurality of mirror circuits that are coupled in parallel for adjusting performance of said second programmable analog block, said second programmable analog block including a second operational amplifier, said second programmable analog block controlled by a second plurality of local configuration bits for selectively cutting in and removing mirror circuits in said second plurality of mirror circuits;
a bias voltage for biasing said array of programmable analog blocks;
and
a plurality of global configuration bits for controlling said bias voltage for adjusting performance of said array of programmable analog blocks.

3 more elements

Dependencies are inferred from the claim text.

Method and apparatus for local and global power management in a programmable analog circuit

Life of this patent

Method and apparatus for local and global power management in a programmable analog circuit

Life of this patent

Abstract

Claims24