Prefetch buffer allocation and filtering system

A method comprising:

• receiving a read request from a processor;
• comparing address specified in said read request against addresses stored in a plurality of entries in a prefetch buffer;
• forwarding data specified in said read request from the prefetch buffer to the processor in response to a read hit from said processor;
• dispatching a prefetch request to prefetch the next sequential address in response to a read hit from said processor;
• dispatching a read request to a memory controller to fetch data specified in said read request in response to a read miss from said processor;
• and
• determining whether or not a prefetch request will be dispatched based on at least one factor indicating if a memory bus will be busy retrieving non-speculative fetch requests in response to a read miss from said processor.

A computer system comprising:

• a processor coupled to a processor bus;
• a main memory;
• and
• a memory controller subsystem coupled between said processor bus and said main memory to coordinate data transfer to and from the main memory at the request of the processor, wherein said memory controller subsystem includes a prefetch buffer having a plurality of entries to store prefetch reads, each entry including a storage area for data and address, a read request controller coupled to said prefetch buffer, wherein said read request controller receives a read request from a processor or I/O devices and controls dispatching of prefetch requests to said main memory, and a read request queue to hold read requests dispatched from the read request controller.