Method and apparatus for detecting errors in data output from memory and a device failure in the memory

An apparatus for detecting errors in data output from memory and a device failure in said memory, comprising:

• a first generator circuit which generates a check code based on data to be input to said memory, said check code is valid when equal to zero;
• a first inverter which inverts said check code to produce an inverted check code, wherein said data and said inverted check code form a codeword which is input to or output from said memory in response to respective write or read commands, and said codeword from said memory indicates whether a device in said memory has failed;
• a second inverter which re-inverts said inverted check code in said codeword to obtain said check code;
• and
• a second generator circuit which generates information indicating whether said data includes an error based on said data and said codeword including said check code.

A method of detecting errors in data output from memory and a device failure in said memory, comprising:

• generating a check code based on data to be input to said memory;
• inverting said check code, wherein said data and said inverted check code form a codeword which is input to or output from said memory in response to respective write or read commands, said check code is a type that causes said codeword to have a value other than all ones when valid, and said codeword output from said memory, when equal to zero, indicates that at least one of a plurality of devices, included in said memory, has failed;
• re-inverting said codeword to obtain said data and said check code;
• and
• generating information indicating whether said data in said codeword includes an error based on said data and said codeword.

An apparatus for detecting errors in data output from memory and a device failure in said memory, comprising:

• a first generator circuit which generates a check code based on data to be input to said memory;
• a first inverter which inverts said data and said check code, wherein said inverted data and check code form a codeword which is input to or output from said memory in response to respective write or read commands, said check code being of a type that causes said codeword to have a value other than all ones when valid, and said codeword from said memory indicates whether a device in said memory has failed;
• a second inverter which re-inverts said codeword to obtain said data and said check code;
• a second generator circuit which generates information indicating whether said data includes an error based on said data and said codeword;
• and
• a zero detection circuit which detects whether said codeword, from said memory is equal to zero, and, when said codeword is equal to zero, indicates that at least one of a plurality of devices, included in said memory, has failed.

A method of detecting device failure in a memory subsystem, comprising:

• applying a given error correction code (ECC) having inverted check bits to data to be written into memory;
• writing a resulting codeword including the data and the ECC code having the inverted check bits into said memory in accordance with a write command;
• reading the resultant codeword including the data and the ECC code having the inverted check bits from said memory in accordance with a read command;
• and
• determining if the resultant codeword including the data and the ECC code having the inverted check bits read from said memory contains one or more errors, and indicates that at least one of a plurality of memory devices, included in said memory, has failed,
• wherein, after the resultant codeword is read from said memory, the inverted check bits of the ECC code included in the resultant codeword read from said memory are re-inverted, and the resultant codeword is then applied to a syndrome computation and a zero computation respectively, to determine the presence of one or more errors and the presence of at least one device failure from said plurality of memory devices included in said memory.