Input/output architecture for efficient configuration of programmable input/output cells
AssigneeTriscend Corporation
InventorsJean-Didier Allegrucci, Brian Fox
Life of this patent
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Abstract
A programmable input/output memory architecture. The programmable input/output memory cells are disposed in two segments about the periphery of the chip. Each segment has two data buses for separate reading and writing of the configuration register. Each cell is selected and configured according to user specifications. Corresponding memory cells from each segment share the same select line, therefore two bytes of configuration data are accessed together and the data is propagated through both segments approximately concurrently thereby reducing propagation delay.
Claims25
An input/output device comprising:
- a plurality of memory cells configured in a plurality of corresponding data propagation segments of at least one memory cell each;
- and
- control logic coupled to the plurality of memory cells such that data propagated from the control logic through the memory cells is propagated approximately concurrently through each of the corresponding data propagation segments.
A method of programming input/output memory cells comprising:
- providing a plurality of memory cells configured in a plurality of corresponding data propagation segments of at least one memory cell;
- and
- propagating data through the corresponding segments of the input/output memory cells approximately concurrently.
A method of reading data from programmable input/output memory cells comprising:
- providing a plurality of memory cells configured in a plurality of corresponding data propagation segments of at least one memory cell;
- selecting programmable input/output memory cells to read;
- propagating read command data through the corresponding segments of the input/output memory cells approximately concurrently to the selected programmable input/output memory cells;
- and
- propagating the data from the selected programmable input/output memory cells back through the corresponding segments of the input/output memory cells.
Dependencies are inferred from the claim text.