Multiple array and method of making a multiple array

A capacitor array of parallel capacitors constructed by multiple layer deposition and arranged in a single manufactured unit, comprising:

• a first capacitor, the first capacitor comprising a first set of capacitor plates with dielectric between the plates, the first capacitor being capable of storing a predetermined electrical charge having a first value;
• a second capacitor, the second capacitor comprising a second set of capacitor plates with dielectric between the plates, the second capacitor being capable of storing a predetermined electrical charge having a second value;
• a third capacitor, the third capacitor comprising a third set of capacitor plates with dielectric between the plates, the third capacitor being capable of storing a predetermined electrical charge having a third value;
• a fourth capacitor, the fourth capacitor comprising a fourth set of capacitor plates with dielectric between the plates, the fourth capacitor being capable of storing a predetermined electrical charge having a fourth value;
• and
• first, second, third and fourth respective pairs of terminations provided at opposing peripheral sides of the single manufactured unit, wherein each pair of terminations provides respective electrical connection to selected of the first, second, third and fourth respective sets of capacitor plates such that each first, second, third and fourth capacitor is respectively configured for distinct circuit connection thereto;
• wherein at least two of said first, second, third, and fourth values are not the same;
• and
• further wherein said capacitor array is encased in dielectric.

A capacitor array, comprising:

• a first capacitor, the first capacitor comprising a first set of capacitor plates with dielectric between the plates, the first capacitor being capable of storing a predetermined electrical charge having a first value;
• a second capacitor, the second capacitor comprising a second set of capacitor plates with dielectric between the plates, the second capacitor being capable of storing a predetermined electrical charge having a second value;
• a third capacitor, the third capacitor comprising a third set of capacitor plates with dielectric between the plates, the third capacitor being capable of storing a predetermined electrical charge having a second value;
• a fourth capacitor, the fourth capacitor comprising a fourth set of capacitor plates with dielectric between the plates, the fourth capacitor being capable of storing a predetermined electrical charge having a first value;
• and
• first, second, third and fourth respective pairs of terminations provided at opposing peripheral sides of the capacitor array, wherein each pair of terminations provides respective electrical connection to selected of the first, second, third and fourth respective sets of capacitor plates such that each first, second, third and fourth capacitor is respectively configured for distinct circuit connection thereto;
• wherein the first and fourth capacitors each exhibit the first value, and the second and third capacitors each exhibit the second value, the first value and second values differing from each other by at least a factor of about 2:1;
• and
• further wherein said capacitor array is encased in a dielectric.

An electrical circuit board having at least one capacitor array attached thereto, comprising:

• (a) a generally planar circuit board having a plurality of electrical current paths thereon;
• and
• (b) a capacitor array comprising
• (i) a first capacitor, the first capacitor comprising a first set of capacitor plates with dielectric between the plates, the first capacitor being capable of storing a predetermined electrical charge having a first value;
• (ii) a second capacitor, the second capacitor comprising a second set of capacitor plates with dielectric between the plates, the second capacitor being capable of storing a predetermined electrical charge having a second value;
• (iii) a third capacitor, the third capacitor comprising a third set of capacitor plates with dielectric between the plates, the third capacitor being capable of storing a predetermined electrical charge having a third value;
• (iv) a fourth capacitor, the fourth capacitor comprising a fourth set of capacitor plates with dielectric between the plates, the fourth capacitor being capable of storing a predetermined electrical charge having a fourth value;
• and
• (v) first, second, third and fourth respective pairs of terminations provided at opposing peripheral sides of the capacitor array, wherein each pair of terminations provides respective electrical connection to selected of the first, second, third and fourth respective sets of capacitor plates such that each first, second, third and fourth capacitor is respectively configured for distinct circuit connection thereto;
• wherein each said termination is connected to a selected electrical current path on said generally planar circuit board;
• and
• wherein the first value and the second value are not the same, and further wherein said capacitor array is encased in a dielectric.

An electrical circuit board having at least one capacitor array attached thereto, comprising:

• (a) a generally planar board having a plurality of electrical current paths thereon;
• and
• (b) a capacitor array comprising:
• a first capacitor, the first capacitor comprising a first set of capacitor plates with dielectric between the plates, the first capacitor being capable of storing a predetermined electrical charge having a first value;
• a second capacitor, the second capacitor comprising a second set of capacitor plates with dielectric between the plates, the second capacitor being capable of storing a predetermined electrical charge having a second value;
• a third capacitor, the third capacitor comprising a third set of capacitor plates with dielectric between the plates, the third capacitor being capable of storing a predetermined electrical charge having a second value;
• a fourth capacitor, the fourth capacitor comprising a fourth set of capacitor plates with dielectric between the plates, the fourth capacitor being capable of storing a predetermined electrical charge having a first value;
• and
• first, second, third and fourth respective pairs of terminations provided at opposing peripheral sides of the capacitor array, wherein each pair of terminations provides respective electrical connection to selected of the first, second, third and fourth respective sets of capacitor plates such that each first, second, third and fourth capacitor is respectively configured for distinct circuit connection thereto;
• wherein the first and fourth capacitors each exhibit a first value, and the second and third capacitors each exhibit a second value, the first value and second value differing from each other by at least a factor of about 2:1;
• and
• further wherein said capacitor array is encased in a dielectric.

A capacitor array of parallel capacitors arranged in a single manufactured unit, comprising:

• a first capacitor, the first capacitor comprising a first set of capacitor plates, the first capacitor being capable of storing a predetermined electrical charge having a first value;
• a first pair of terminations provided at opposing peripheral sides of the single manufactured unit, wherein said first pair of terminations provides respective electrical connection to selected of the first set of capacitor plates such that said first capacitor is configured for distinct circuit connection thereto;
• a second capacitor, the second capacitor comprising a second set of capacitor plates, the second capacitor being capable of storing a predetermined electrical charge having a second value, wherein the first value and the second value are not the same, such that the capacitor array comprises at least two capacitors that differ in capacitance value;
• and
• a second pair of terminations provided at opposing peripheral sides of the single manufactured unit, wherein said second pair of terminations provides respective electrical connection to selected of the second set of capacitor plates such that said second capacitor is configured for distinct circuit connection thereto.