Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Hisashi Ohtani, Setsuo Nakajima
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Abstract
A semiconductor device that uses a high reliability TFT structure is provided. The gate electrode of an n-channel type TFT is formed by a first gate electrode and a second gate electrode that covers the first gate electrode. LDD regions have portions that overlap the second gate electrode through a gate insulating film, and portions that do not overlap. As a result, the TFT can be prevented from degradation in an ON state, and it is possible to reduce the leak current in an OFF state.
Claims30
A semiconductor device having a CMOS circuit including an n-channel TFT and a p-channel TFT, said n-channel TFT comprising:
- a gate electrode including a first gate electrode and a second gate electrode covering an upper surface and a side surface of said first gate electrode, wherein said second gate electrode comprises a semiconductor film;
- a semiconductor layer having a channel forming region, first impurity regions formed in contact with said channel forming region, and second impurity regions formed in contact with said first impurity regions, wherein
- said second gate electrode overlaps a portion of said first impurity regions through a gate insulating film.
A semiconductor device having a CMOS circuit including an n-channel TFT and a p-channel TFT, said n-channel TFT comprising:
- a gate electrode including a first gate electrode and a second gate electrode covering said first gate electrode, wherein said second gate electrode comprises a semiconductor film;
- a semiconductor layer having a channel forming region, first impurity regions formed in contact with said channel forming region, and second impurity regions formed in contact with said first impurity regions, wherein
- said first impurity regions have regions that overlap and regions that do not overlap said second gate electrode through a gate insulating film.
A semiconductor device having a CMOS circuit including an n-channel TFT and a p-channel TFT, said n-channel TFT comprising:
- a gate electrode including a first gate electrode and a second gate electrode covering an upper surface and a side surface of said first gate electrode, wherein said second gate electrode comprises a semiconductor film;
- a semiconductor layer having a channel forming region, first impurity regions formed in contact with said channel forming region, and second impurity regions formed in contact with said first impurity regions, wherein
- an edge portion of said second gate electrode is above said first impurity regions.
A semiconductor device having at least one n-channel TFT in a pixel section, said n-channel TFT comprising:
- a gate electrode including a first gate electrode and a second gate electrode covering an upper surface and a side surface of said first gate electrode, wherein said second gate electrode comprises a semiconductor film;
- a semiconductor layer having a channel forming region, first impurity regions formed to contact with said channel forming region, and second impurity regions formed in contact with said first impurity regions, wherein
- said second gate electrode overlaps a portion of said first impurity regions through a gate insulating film.
A semiconductor device having at least one n-channel TFT in a pixel section, said n-channel TFT comprising:
- a gate electrode including a first gate electrode and a second gate electrode covering said first gate electrode, wherein said second gate electrode comprises a semiconductor film;
- a semiconductor layer having a channel forming region, first impurity regions formed in contact with said channel forming region, and second impurity regions formed in contact with said first impurity regions, wherein
- said first impurity regions have regions that overlap, and regions that do not overlap, said second gate electrode through a gate insulating film.
A semiconductor device having at least one n-channel TFT in a pixel section, said n-channel TFT comprising:
- a gate electrode including a first gate electrode and a second gate electrode covering an upper surface and a side surface of said first gate electrode, wherein said second gate electrode comprises a semiconductor film;
- a semiconductor layer having a channel forming region, first impurity regions formed in contact with said channel forming region, and second impurity regions formed in contact with said first impurity regions, wherein
- an edge portion of said second gate electrode is above said first impurity regions.
A semiconductor device having at least one n-channel TFT in a pixel section, said n-channel TFT comprising:
- a gate electrode including a first gate electrode and a second gate electrode covering said first gate electrode, wherein said second gate electrode comprises a semiconductor film;
- a semiconductor layer having a channel forming region, first impurity regions formed in contact with said channel forming region, and second impurity regions formed in contact with said first impurity regions, wherein
- a semiconductor layer that includes a periodic table group 15 element in the same concentration as that of said first impurity regions is used as an electrode of a supplemental capacitive section.
Dependencies are inferred from the claim text.