Fast frame synchronization
AssigneeAgere Systems Inc.
InventorsMohammad Rez Karim, Robert Louis Cupo, Mohsen Sarraf, Mohammad Zarrabizadeh
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AssigneeAgere Systems Inc.
InventorsMohammad Rez Karim, Robert Louis Cupo, Mohsen Sarraf, Mohammad Zarrabizadeh
Estimating the term…
A receiver for receiving synchronized digital transmissions organized in frames, each frame having a frame start, has a clock for generating pulses at time intervals with respect to a time reference and a counter for generating a count of the time intervals with respect to the time reference. A/D converters sample the digital transmission using the pulses from the clock. A cyclic prefix correlator detects the frame start during a count corresponding to an A/D sample. This count is indicative of the time interval during which the frame start was detected with respect to the reference. A memory is provided for storing a plurality (typically 36) counts indicative of the time interval during which the frame start was detected. A pointer is generated from the counts stored in memory. The pointer is indicative of a projected time interval during which a future frame start is expected to arrive. This projected time interval is computed by using a lead/lag digital filter and an oscillator responsive to the digital filter. One or more portions of the receiver are implemented using a programmable signal processor.
A receiver for receiving a digital transmission, said digital transmission composed of a sequence of consecutive bits, said sequence of consecutive bits forming a plurality of frames, each of said frames having a frame start, said receiver comprising:
A receiver for receiving a digital transmission, said digital transmission composed of a sequence of consecutive bits, said sequence of consecutive bits forming a plurality of frames, each of said frames having a frame start, said receiver comprising:
A receiver for receiving a digital transmission, said digital transmission composed of a sequence of consecutive bits, said sequence of consecutive bits forming a plurality of frames, each of said frames having a frame start, said receiver comprising:
A method for synchronizing reception of a digital transmission, said digital transmission composed of a sequence of consecutive bits, said sequence of consecutive bits forming a plurality of frames, each of said frames having a frame start, comprising the steps of:
A method for synchronizing reception of a digital transmission, said digital transmission composed of a sequence of consecutive bits, said sequence of consecutive bits forming a plurality of frames, each of said frames having a frame start, comprising the steps of:
A method for synchronizing reception of a digital transmission, said digital transmission composed of a sequence of consecutive bits, said sequence of consecutive bits forming a plurality of frames, each of said frames having a frame start, comprising the steps of:
A programmable signal processor programmed for synchronizing the reception of a digital transmission, said digital transmission composed of a sequence of consecutive bits, said sequence of consecutive bits forming a plurality of frames, each of said frames having a frame start said programmable processor performing the steps of:
A programmable signal processor programmed for synchronizing the reception of a digital transmission, said digital transmission composed of a sequence of consecutive bits, said sequence of consecutive bits forming a plurality of frames, each of said frames having a frame start, said programmable processor performing the steps of:
A programmable signal processor programmed for synchronizing the reception of a digital transmission, said digital transmission composed of a sequence of consecutive bits, said sequence of consecutive bits forming a plurality of frames, each of said frames having a frame start, said programmable processor performing the steps of:
Dependencies are inferred from the claim text.