Stacked semiconductor device and semiconductor system
AssigneeKabushiki Kaisha Toshiba
InventorJun Ohmori
Life of this patent
Estimating the term…
Abstract
A stacked semiconductor device includes a plurality of stacked wiring substrates each having connection electrodes and wires connected to the connection electrodes and each mounted with a semiconductor device, a plurality of conductive via boards each interposed between adjacent two wiring substrates and having an opening for enclosing the semiconductor device, an uppermost wiring substrate formed on the top of the stacked wiring substrates and having wires connected to the connection electrodes, and a lowermost wiring substrate formed under the stacked wiring substrates and having wires connected to the connection electrodes, wherein heat radiation/shield conductive layers are formed on the uppermost and lowermost wiring substrates.
Claims19
A stacked semiconductor device comprising:
- a plurality of stacked wiring substrates each including a plurality of via-holes in which first connection electrodes are formed and first wires electrically are connected to the first connection electrodes;
- an uppermost wiring substrate stacked on a top of the stacked wiring substrates and including a plurality of via-holes in which second connection electrodes are formed and second wires are electrically connected to the second connection electrodes;
- a plurality of semiconductor devices mounted on the respective wiring substrates and electrically connected to the first wires thereof,
- a plurality of conductive via insulation substrates each having a cavity which is larger than the semiconductor device enclosed therein and each including a plurality of via-holes in which third connection electrodes are formed, one of the conductive via insulation substrates being stacked on one of the stacked wiring substrates;
- and
- a plurality of conductive layers formed on a top surface of the uppermost wiring substrate and/or a bottom surface of a lowermost wiring substrate formed under the stacked wiring substrates,
- wherein an area of said plurality of conductive layers occupying at least one surface of said uppermost and lowermost wiring substrates ranges from 50% to 95%.
A stacked semiconductor system comprising a module substrate having spring terminals which hold a stacked semiconductor device having external connection terminals,
- wherein the external connection terminals are pressed by the spring terminals, and
- wherein said stacked semiconductor device comprises:
- a plurality of stacked wiring substrates each including a plurality of via-holes in which first connection electrodes are formed and first wires are electrically connected to the first connection electrodes;
- an uppermost wiring substrate stacked on a top of the stacked wiring substrates and including a plurality of via-holes in which second connection electrodes are formed and second wires electrically are connected to the second connection electrodes;
- a plurality of semiconductor devices mounted on the respective wiring substrates and electrically connected to the first wires thereof;
- a plurality of conductive via insulation substrates each having a cavity which is larger than the semiconductor device enclosed therein and each including a plurality of via-holes in which third connection electrodes are formed, one of the conductive via insulation substrates being stacked on one of the stacked wiring substrates;
- and
- a plurality of conductive layers formed on a top surface of the uppermost wiring substrate and/or a bottom surface of a lowermost wiring substrate formed under the stacked wiring substrates,
- wherein an area of said plurality of conductive layers occupying at least one surface of said uppermost and lowermost wiring substrates ranges from 50% to 95%.
Dependencies are inferred from the claim text.