Highly conductive composite polysilicon gate for CMOS integrated circuits

A gate structure for a field-effect transistor, comprising:

• a gate insulation structure contacting a channel region of the transistor, a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer
• doped to define a threshold voltage for the transistor;
• a diffusion barrier layer adjacent the doped polysilicon layer and comprising at least one
• of a silicon carbide, a silicon oxycarbide, and an amorphous silicon;
• and a metal layer contacting the diffusion barrier layer.

An integrated memory circuit comprising:

• a memory array having a plurality of memory cells;
• an address decoder coupled to the memory cells;
• a plurality of bit lines coupled to the memory cells;
• a voltage-sense-amplifier circuit coupled to the bit lines;
• and
• wherein at least one of the memory cells and the voltage-sense amplifier circuit includes a field effect transistor comprising:
• a gate insulation structure contacting a channel region of the transistor;
• a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer doped to define a threshold voltage for the transistor;
• a diffusion barrier layer adjacent the doped polysilicon layer;
• and
• a metal layer contacting the diffusion barrier layer adn comprising at least one of gold and silver.

An integrated-circuit assembly, comprising:

• a plurality of field-effect transistors formed on a silicon substrate, with at least two transistors sharing a common source or drain region;
• and
• wherein at least one transistor includes:
• a gate insulation structure contacting a channel region of the one transistor;
• a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer doped to define a threshold voltage for the one transistor;
• and
• a diffusion barrier layer adjacent the doped polysilicon layer;
• and
• a metal layer contacting the diffusion barrier layer and comprising at least one of gold and silver.

An integrated-circuit assembly for making an electrode for a transistor, the assembly comprising:

• a semiconductive layer;
• a metal-substitutable layer adjacent the semiconductive layer and comprising at least one of polysilicon and germanium oxide;
• a first metal layer contacting the metal-substitutable layer and comprising materials susceptible to cross-diffusion at certain temperatures with one or more portions of the metal-substitutable layer;
• a doped polysilicon layer contacting the semiconductive layer;
• a diffusion barrier layer between the doped polysilicon layer and the metal-substitutable layer;
• and
• a second metal layer contacting the first metal layer, the second metal layer including at least one of hafnium, zirconium, and titanium.

A gate structure for a field-effect transistor, comprising:

• a gate insulation structure contacting a channel region of the transistor;
• a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer doped to define a threshold voltage for the transistor;
• a diffusion barrier layer adjacent the doped polysilicon layer and consisting essentially of at least one of a silicon carbide, a silicon oxycarbide, and an amorphous silicon;
• and
• a gold layer contacting the diffusion barrier layer.

A gate structure for a field-effect transistor, comprising:

• a gate insulation structure contacting a channel region of the transistor;
• a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer doped to define a threshold voltage for the transistor;
• a diffusion barrier layer adjacent the doped polysilicon layer and comprising at least one of a silicon carbide, a silicon oxycarbide, and an amorphous silicon;
• and
• a silver layer contacting the diffusion barrier layer.

A gate structure for a field-effect transistor, comprising:

• a gate insulation structure contacting a channel region of the transistor;
• a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer doped to define a threshold voltage for the transistor;
• a diffusion barrier layer adjacent the doped polysilicon layer and consisting essentially of a silicon carbide;
• and
• a silver or gold layer contacting the diffusion barrier layer.