Memory LSI with compressed data inputting and outputting function

Abstract

A memory LSI with compressed data inputting and outputting function provides reduction of data transfer amount and whereby to expand effective passband width with restricting transfer loss upon transfer of variable length compressed data. Data size detection circuit detects a size of a compressed data input from an external device on the basis of a compression information added to the compressed data and indicative of a size of data after compression. A data input and output circuit and an instruction decoder are operated for a period necessary for writing operation to write in the compressed data in a memory cell array. The data size detection circuit detects size of the compressed data held in the memory cell array on the basis of the compression information upon reading out to operate the data input and output circuit and the memory cell array for a period necessary for reading operating to read out compressed data to the external device.

Dependencies are inferred from the claim text.