Method and apparatus for assigning PLD signal routes to input signals having different voltage requirements

A computer-implemented method for routing input signals in a PLD circuit design from input pins to programmable logic elements via an interconnect multiplexer, wherein the interconnect multiplexer has a plurality of input resources coupled to the input pins and a plurality of output resources programmably coupled to the programmable logic elements, and wherein the input signals are compatible with a plurality of different input voltage standards, the method comprising:

• creating logical clusters of input signals, wherein the input signals in each logical cluster have a common input voltage standard;
• creating physical clusters of input pins, wherein each physical cluster is associated with an input voltage standard and has associated therewith one or more programmable logic elements;
• pairing the logical clusters with the physical clusters, wherein a paired logical cluster and physical cluster are compatible with the same input voltage standard;
• and
• for each paired logical cluster and physical cluster, routing the input signals of the logical cluster from the pins of the physical cluster to the programmable logic elements of the physical cluster via the interconnect multiplexer input resources and the interconnect multiplexer output resources.