Source-destination re-timed cooperative communication bus

In an integrated circuit having a plurality of modules coupled to each other by an internal communication bus having a control bus, a method comprising:

• driving an active bus cycle signal on said control bus to indicate a start of a bus cycle;
• and
• driving said bus cycle signal inactive to indicate an end of said bus cycle that contains at least one data transfer including any number of data phases wherein said bus cycle signal remains active until said driving said bus cycle signal inactive occurs.

In an integrated circuit having a plurality of modules coupled to each other by an internal communication bus having a control bus, a method comprising:

• selectively coupling a sequencer output bus having a first width to one of a first destination data bus having said first width and a second data destination data bus having said first width wherein said first and second destination data buses comprise a communication destination data bus of said internal communication bus;
• and
• selectively coupling a source data bus having said first width to one of said first destination data bus and said second data destination data bus wherein said source data bus is included in a communication source data bus of said internal communication bus.