Radio frequency electronic switch
AssigneeMotorola, Inc.
InventorsJeffrey C. Durec, David Kevin Lovelace, Mark D. Randol
Life of this patent
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Abstract
A radio frequency (RF) switch (40) for use in a wireless communication system operated in a time delay division mode of operation. The switch includes a pair of PIN diodes (54 and 56) serially coupled between the transmitter and receiver paths of the communication system which share a common node (58) to which a bias voltage is provided. The bias voltage is switched between first and second voltage levels to alternately cause one and the other of the pin diodes to be forward biased while the other is reversed bias. In this manner the transmitter and receiver paths will be alternately shorted to alternating current ground while the other path is shorted to a common node to an antenna.
Claims17
In a communication system having both a transmit path and a receive path coupled to an common antenna node for transmitting and receiving respectively a radio frequency (RF) signal there at in a duplex mode of operation, a RF switch circuit, comprising;
- an impedance transformation circuit in the transmit path coupled between the common antenna node and a transmitter node;
- an impedance transformation circuit in the receiver path coupled between the common antenna node and a receiver node;
- first and second diodes serially coupled between said transmitter node and said receiver node and having a common node there between to which a bias voltage is supplied from a terminal, said bias voltage being switched between first and second voltage levels in the duplex mode of operation;
- and
- additional circuitry coupled between said common node, said transmitter node, and said receiver node, said additional circuitry providing an alternating current ground at said common node to which said transmitter and receiver nodes are alternatively coupled during said duplex mode of operation.
A current switch for use in a RF communication system to alternately couple first and second nodes to a common node, comprising:
- a first impedance transformation circuit coupled between the first node and the common node;
- a second impedance transformation circuit coupled between the second node and the common node;
- a first semiconductor switch coupled between the first node and a common bias node;
- a second semiconductor switch coupled between said common bias node and the second node;
- a bias voltage supplied from a terminal to said common bias node for switching between first and second voltage levels;
- and
- a capacitance coupled between said common bias node and alternating current ground.
Dependencies are inferred from the claim text.