Semiconductor device
AssigneesKabushiki Kaisha Toshiba, Fujitsu Limited
InventorsMasaharu Wada, Kenji Tsuchida, Atsushi Takeuchi
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Abstract
The present invention relates to overdrive circuits for generating an operational potential of a sense amplifier. For example, a switch circuit is used to connect a drive node of the sense amplifier with a overdrive potential generation circuit for generating an overdrive potential to be applied to bit lines. A restoration potential generation circuit comprises a push-pull regulator circuit for generating a restoration potential to be applied to bit lines. Consequently, the restoration potential generation circuit can directly connect with the sense amplifier's drive node.
Claims22
A semiconductor device, comprising:
- a sense amplifier for amplifying a potential of a bit line;
- a first generation circuit for generating an overdrive potential needed for an overdrive operation of said bit line according to said sense amplifier;
- a switch circuit for controlling supply of said overdrive potential to a positive electrode of said sense amplifier;
- and
- a second generation circuit comprising a push-pull regulator circuit connected to said positive electrode of said sense amplifier, wherein said second generation circuit generates a restoration potential of said overdriven bit line.
A semiconductor device comprising:
- a plurality of memory cell blocks arranged in a matrix;
- a plurality of sense amplifiers for amplifying a potential of a bit line;
- a plurality of main row decoders for controlling drive of one main word line for controlling selection of a plurality of word lines;
- a plurality of segment row decoders driven by selecting a specific word line from said plurality of word lines corresponding to said one main word line;
- a plurality of first generation circuits for generating an overdrive potential needed for an overdrive operation of said bit line according to said plurality of sense amplifiers;
- a plurality of switch circuits for controlling supply of said overdrive potential to respective positive electrodes of said plurality of sense amplifiers;
- and
- a plurality of second generation circuits comprising push-pull regulator circuits respectively connected to positive electrodes of said plurality of sense amplifiers, wherein said plurality of second generation circuits generate a restoration potential for said bit line after the overdrive operation, wherein
- said plurality of memory cell blocks and said plurality of sense amplifiers are alternately arranged in a first direction;
- said plurality of segment row decoders are arranged respectively adjacent to said plurality of memory cell blocks in a second direction orthogonal to said first direction;
- said plurality of main row decoders are arranged at one end of said second direction;
- said plurality of switch circuits are arranged in a plurality of first regions adjacent to said plurality of sense amplifiers;
- said plurality of first generation circuits are arranged at one end of said first direction;
- and
- said plurality of second generation circuits are arranged in a plurality of second regions adjacent to said plurality of main row decoders.
Dependencies are inferred from the claim text.