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US 6,487,130 B2Granted
Semiconductor integrated circuit device
AssigneeFujitsu Limited
InventorsToru Endo, Shoichiro Kawashima
Life of this patent
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Abstract
A semiconductor device includes memory cells of one-transistor one-capacitor connected to n+1 bit lines that are simultaneously driven, sense amplifiers connected to the n+1 bit lines, and a reference voltage generating circuit generates an average voltage of a highest voltage and a lowest voltage among bit line voltages that are obtained by accessing the n+1 bit lines in parallel, and supplying the average voltage to the sense amplifiers as a reference voltage.
Claims7
A semiconductor device comprising:
- memory cells of one-transistor one-capacitor connected to n+1 bit lines that are simultaneously driven;
- sense amplifiers connected to the n+1 bit lines;
- and
- a reference voltage generating circuit generates an average voltage of a highest voltage and a lowest voltage among bit line voltages that are obtained by accessing the n+1 bit lines in parallel, and supplying the average voltage to the sense amplifiers as a reference voltage.
1 more element
A semiconductor device comprising:
- memory cells of one-transistor one-capacitor type connected to n+1 bit lines that are simultaneously driven;
- pairs of sense amplifiers respectively connected to the n+1 bit lines;
- and
- a reference voltage generating circuit supplying, as first and second reference voltages, the sense amplifiers with a highest voltage and a lowest voltage among bit line voltages obtained when the n+1 bit lines are accessed in parallel, or voltage corresponding to the highest and lowest voltages.
1 more element
Dependencies are inferred from the claim text.