Oversampling circuit and digital/analog converter

An oversampling circuit, characterized by comprising:

• a multiplying unit for performing a plurality of multiplying process using plural multiplicators on plural pieces of digital data inputted at a predetermined intervals;
• a plurality of step function generation unit for generating step functions corresponding to each of the plural pieces of digital data using plural of multiplication result obtained by the multiplying unit synchronized with an input timing of each of the plural pieces of digital data;
• an addition unit for performing a process of adding up values of the step functions generated by the plurality of step function generation unit;
• and
• an integrating unit for performing a digital integrating process plural times on output data from the addition unit,
• characterized in that each of the multiplicators used in the multiplying processes by the multiplying unit corresponds to each of the values of step functions obtained by differentiating plural times piecewise polynomials for a predetermined sampling function configured by the piecewise polynomials.

An oversampling circuit, characterized by comprising:

• a multiplying unit for performing a plurality of multiplying process using plural multiplicators on plural pieces of digital data inputted at a predetermined intervals;
• a plurality of step function generation unit for generating step functions corresponding to each of the plural pieces of digital data using plural of multiplication result obtained by the multiplying unit synchronized with an input timing of each of the plural pieces of digital data;
• an addition unit for performing a process of adding up values of the step functions generated by the plurality of step function generation unit;
• and
• an integrating unit for performing a digital integrating process plural times on output data from the addition unit,
• characterized in that times of said digital integration is two, and data whose value changes like a quadric function is output from said integrating unit.

An oversampling circuit, characterized by comprising:

• a multiplying unit for performing a plurality of multiplying process using plural multiplicators on plural pieces of digital data inputted at a predetermined intervals;
• a plurality of step function generation unit for generating step functions corresponding to each of the plural pieces of digital data using plural of multiplication result obtained by the multiplying unit synchronized with an input timing of each of the plural pieces of digital data;
• an addition unit for performing a process of adding up values of the step functions generated by the plurality of step function generation unit;
• and
• an integrating unit for performing a digital integrating process plural times on output data from the addition unit,
• characterized in that said digital integration performed by said integrating unit is an operating process of accumulating input data, and n times of an oversampling process is performed by repeatedly performing the operating process n times in one period of inputting the digital data.

A digital-to-analog converter, comprising:

• an oversampling circuit, said oversampling circuit characterized by comprising:
• a multiplying unit for performing a plurality of multiplying process using plural multiplicators on plural pieces of digital data inputted at a predetermined intervals;
• a plurality of step function generation unit for generating step functions corresponding to each of the plural pieces of digital data using plural of multiplication result obtained by the multiplying unit synchronized with an input timing of each of the plural pieces of digital data;
• an addition unit for performing a process of adding up values of the step functions generated by the plurality of step function generation unit;
• and
• an integrating unit for performing a digital integrating process plural times on output data from the addition unit, and
• comprising at a stage subsequent to said oversampling circuit,
• voltage generation unit for generating an analog voltage corresponding to a value of data output by said integrating unit;
• and
• smoothing unit for smoothing the analog voltage generated by said voltage generation unit.