Double-tuned circuit of tuner featuring restrained degradation of selectivity
AssigneeAlps Electric Co., Ltd.
InventorsMasaki Yamamoto, Akira Yamamoto
Life of this patent
Estimating the term…
Loading patent…
AssigneeAlps Electric Co., Ltd.
InventorsMasaki Yamamoto, Akira Yamamoto
Estimating the term…
A double-tuned circuit of a tuner that can be switched for tuning to a plurality of frequency bands by turning a switching diode ON or OFF restrains degradation of a selectivity caused by an undesirable additional tuning circuit or parasitic tuning circuit formed by a capacitance generated when the switching diode is OFF and inter-terminal capacitance of a resistor. A double-tuned circuit of a tuner is also provided that exhibits good selectivity with reduced damping to a tuning circuit in a low-band receiving mode, and also exhibits a wider tuning range. A feed resistor for high-band receiving is directly connected to a switching diode in a primary tuning circuit, and the feed resistor for high-band receiving is connected to a switching diode via a coil in a secondary tuning circuit. Hence, the tuning frequency of a parasitic tuning circuit in the primary tuning circuit is lower than the tuning frequency of a parasitic tuning circuit in the secondary tuning circuit, so that the peak of a frequency characteristic generated by the parasitic tuning circuit can be reduced. As a result, the interference with intermediate frequency signals can be reduced.
A double-tuned circuit of a tuner, comprising:
Dependencies are inferred from the claim text.