Class AB single-range advanced operational amplifier
AssigneeSTMicroelectronics S.r.l.
InventorsPaolo Cusinato, Andrea Baschirotto, Vittorio Colonna, Gabriele Gandolfi
Life of this patent
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Abstract
A class AB single-stage operational amplifier having input decoupler stages for voltage signals, a voltage repeater stage, biasing transistors and bias current generators for the input decoupler stages, and capacitors placed between the input decoupler stages and the voltage repeater stage so as to increase the phase margin.
Claims20
A class AB single-stage operational amplifier comprising:
- first and second input decoupler stages having inputs for the operational amplifier for voltage signals, a voltage repeater stage, biasing means, and means for the generation of bias current of said input decoupler stages, and capacitive means placed between said input decoupler stages and said voltage repeater so as to eliminate a low frequency pole and increase the phase margin.
An operational amplifier, comprising:
- a first input decoupler stage coupled between a first voltage source and a second voltage source and having inputs comprising inputs to the operational amplifier;
- a second input decoupler stage coupled between the first voltage source and the second voltage source;
- a voltage repeater stage coupled between the first input decoupler stage and the second input decoupler stage;
- a first compensation capacitor coupled in parallel between the voltage repeater stage and the first input decoupler stage;
- and
- a second compensation capacitor coupled in parallel between the voltage repeator stage and the second input decoupler stage.
A fully differential operational amplifier, comprising:
- an inverting input circuit and a non-inverting input circuit coupled between a voltage source and a voltage reference;
- a voltage repeater stage coupled between the inverting input circuit and the non-inverting input circuit;
- an inverting and non-inverting output circuit coupled to the voltage repeater stage;
- the inverting input circuit comprising a first PMOS transistor having a gate terminal coupled to an inverting input terminal and a first NMOS transdiode transistor coupled in series to the first PMOS transistor;
- the non-inverting input circuit comprising a second PMOS transistor having a gate terminal coupled to a non-inverting input terminal and a second NMOS transdiode transistor coupled in series to the second PMOS transistor;
- a first compensation capacitor coupled between gate terminals of the first PMOS transistor and first NMOS transdiode transistor;
- and
- a second compensation capacitor coupled between gate terminals of the second PMOS transistor and the second NMOS transdiode transistor.
A method for increasing the phase margin of an operational amplifier having a first input decoupler stage coupled between a first voltage source and a second voltage source;
- a second input decoupler stage coupled between the first voltage source and the second voltage source;
- a voltage repeater stage coupled between the first input decoupler stage and the second input decoupler stage, the method comprising:
- coupling a first compensation capacitor in parallel between the voltage repeater stage and the first input decoupler stage;
- and
- coupling a second compensation capacitor in parallel between the voltage repeater stage and the second input decoupler stage.
A class AB single-stage operational amplifier, comprising:
- input decoupler stages for voltage signals that are formed by MOS transistors, a voltage repeater stage formed by MOS transistors, a common gate terminal of at least one MOS transistor of the input decoupler stages and of at least one MOS transistor of the voltage repeater stage forming the input terminals of the class AB single-stage operational amplifier, biasing means, and means for the generation of bias current of the input decoupler stages, and further comprising capacitive means connected to the input terminal of the class AB single-stage operational amplifier and another common gate terminal of another MOS transistor of the input decoupler stages and of another MOS transistor of the voltage repeater stage so as to generate an output having a low frequency pole that coincides with a low frequency zero.
Dependencies are inferred from the claim text.