Flip-flop circuit arrangement with increased cut-off frequency
AssigneeATMEL Germany GmbH
InventorReinhard Reimann
Life of this patent
Estimating the term…
Abstract
In a flip-flop including a control element and a holding element, in which a first current causes the control element to set a logic state and a second current causes the holding element to maintain the logic state, the cut-off frequency is increased by dimensioning the transistors of the holding element to be smaller than the transistors of the control element. In other words the transistors of the holding element have a smaller current-carrying capacity than the transistors of the control element.
Claims13
A flip-flop including at least one control element having at least two transistors and at least one holding element having at least two transistors, and means for supplying a first current to said control element so that it sets a logic state of the flip-flop and a second current to said holding element so that it maintains said logic state, wherein said transistors of said holding element have smaller dimensions and a smaller current-carrying capacity than said transistors of said control element.
A digital flip-flop circuit comprising:
- two input lines and two output lines;
- a control element including two first transistors connected respectively to said two input lines and configured to set a digital logic output state present on said two output lines responsive to a digital input state provided on said two input lines;
- and
- a holding element including two second transistors connected to said two output lines and configured to hold said digital logic output state present on said two output lines;
- wherein said second transistors of said holding element each respectively have a smaller current-carrying capacity than said first transistors of said control element.
Dependencies are inferred from the claim text.