Microprocessor self-power down circuit

A self-power down circuit for a circuit including a battery and a controller coupled to the battery to obtain power from the battery,

• the self-power down circuit including a port of the controller, the port changing state during initialization and power-down of the controller, a first switching device including a main current conducting path and a control terminal, the control terminal coupled to the port for monitoring the state of the port, a second switching device including a main current conducting path and a control terminal, and a switch, the port being coupled to the battery through the main current conducting path of the second switching device, the control terminal of the second switching device being coupled to the switch for actuation by actuation of the switch, the control terminal of the second switching device also coupled to the main current conducting paths of the first and second switching devices through first and second voltage dropping elements, respectively, the first switching device including a first field effect transistor (FET), the main current conducting path of which includes the first FET's drain and source terminals, and the control terminal of which is the first FET's gate terminal, the second switching device including a second FET, the main current conducting path of which includes the second FET's drain and source terminals, and the control terminal of which is the second FET's gate terminal, the second voltage dropping element including a second voltage dropping element resistor, the gate of the second FET being coupled through the second voltage dropping element resistor to one of the source and drain of the first FET, the main current conducting path of the first FET being coupled to a first terminal of the switch, a second terminal of the switch being coupled to the gate of the second FET.