CMOS pass transistor logic circuitry using quantum mechanical tunneling structures

A semiconductor device performing Boolean operations, said device comprising:

• pass transistor network circuitry implementing a specified Boolean condition comprising at least one pass transistor having an input terminal, an output terminal and a control gate and coupling a signal at the input terminal to the output terminal through the pass transistor responsive to a signal at the control gate;
• and
• tunneling diode circuitry, coupled to said pass transistor network circuitry at a node which said specified Boolean condition is to be evaluated, to compensate a leakage current originating from said pass transistor network circuitry and further holding said node at a given voltage supplied by pre-charge circuitry.
• 7.The device of claim 6 wherein said device, including said tunneling structure circuitry, is fabricated in a CMOS process.

A method of producing a pass transistor logic device, said method comprising the steps of:

• providing a pass transistor circuit implementing a specified Boolean condition comprising at least one pass transistor having an input terminal, an output terminal and a control gate and coupling a signal at the input to the output responsive to a signal at the control gate;
• providing tunneling structure circuitry;
• providing a node where said specified Boolean condition is evaluated;
• providing pre-charge circuitry coupled to said node;
• coupling said tunneling structure circuitry to said pass transistor circuit at said node, said tunneling structure circuitry compensating for a leakage current originating from said pass transistor circuit by holding said node at a given voltage supplied by said precharge circuitry.