Termination structure for high speed, high pin density chips

Abstract

An apparatus including first and second devices, at least one connection between an input of the second device and an output of the first device, and at least one resistor in series between the connection and the input of the second device. The series resistor, acting as a type of end termination, positively alters the waveforms of the signals input to the second device. In particular, glitches and ringing after the input pin package or at the input of the second device (at the gate for a CMOS transistor) are reduced. Overshoots and undershoots are also reduced. As a result, the input signals are usable and the interface between the first and second devices operates correctly. Further, the setup procedure of the valid logic level of the input signal can be accomplished much more quickly and is much more stable. The series resistor also consumes very little extra power.

Dependencies are inferred from the claim text.