Method and apparatus for testing integrated circuit chips that output clocks for timing
AssigneeTeradyne, Inc.
InventorsGeorge Conner, Peter Reichert
Life of this patent
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Abstract
An automatic test system useful for testing source synchronous devices at high speed. The data outputs of the device under test are routed to channel circuitry within the test system through coaxial cables. The test system includes a buffer amplifier on a device interface board to fan out the DATA CLOCK generated by the device under test to that channel circuitry. The interconnection between the buffer amplifier and the channel circuitry is provided through a coax with low dielectric constant, to compensate for the delay introduced by the buffer amplifier.
Claims18
An automatic test system adapted for testing source synchronous parts, each part having data outputs and a data clock output, the automatic test system comprising:
- a) an interface unit having a support structure for receiving a device under test, the support structure providing connection points for the data outputs and data clock outputs of a device under test;
- b) a buffer amplifier, the amplifier having an input and an output, with the input being connected to the connection point for the data clock output;
- c) a plurality of receive channel circuits, each of the receive channel circuits having a comparator circuit with a data input, a strobe input and an output, the output being latched in response to the strobe input;
- d) a first plurality of transmission lines each carrying a signal between a connection point for the data outputs on the interface unit and a data input of the comparator circuit in a receive channel circuit;
- and
- e) a second plurality of transmission lines each carrying a signal between the output of the buffer amplifier and a strobe input of a comparator circuit of a receive channel;
- f) wherein the second plurality of transmission lines introduces a shorter propagation delay than the first plurality of transmission paths.
An automatic test system adapted for testing source synchronous parts, each part having data outputs and an data clock output, the test system comprising:
- a) a plurality of receive channel circuits each channel circuit having at least one data input and one strobe input, the channel circuit measuring the data at the data input in response to the strobe input;
- b) a contactor adapted to connect to a device under test;
- d) a fanout circuit having an input and an output, with the input connected to the contactor;
- e) a coaxial cable of a first type having a first end and a second end, with the first end connected to the output of the fanout circuit and the second end connected to the strobe input;
- d) a coaxial cable of a second type having a first end and a second end, with the first end connected to the contactor and the second end connected to the data input.
An automatic test system adapted for testing source synchronous parts, each part having data outputs and an data clock output, the test system comprising:
- a) at least one channel card, having a plurality of semiconductor chips thereon, each such chip having a plurality of receive channel circuits therein, each receive channel circuit having at least a data input and a strobe input;
- b) a contactor adapted to receive a device under test;
- c) a fan out circuit connected to the contactor;
- d) a first plurality of signal transmission paths between the contactor and the data inputs of the receive channels, the signal transmission paths including transmission lines supporting signal propagation at a first propagation delay;
- e) a second plurality of signal transmission paths between the contactor and the strobe inputs of the receive channels, each of the second plurality of signal transmission paths including the fanout circuit and a transmission line supporting signal propagation at a second propagation delay, shorter than the first propagation delay.
Dependencies are inferred from the claim text.