Method and apparatus for testing bumped die
AssigneeMicron Technology, Inc.
InventorJames M. Wark
Life of this patent
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AssigneeMicron Technology, Inc.
InventorJames M. Wark
Estimating the term…
A method and apparatus for testing unpackaged semiconductor dice having raised contact locations are disclosed. The apparatus uses a temporary interconnect wafer that is adapted to establish an electrical connection with the raised ball contact locations on the die without damage to the ball contact locations. The interconnect is fabricated on a substrate, such as silicon, where contact members are formed in a pattern that matches the size and spacing of the contact locations on the die to be tested. The contact members on the interconnect wafer are formed as either pits, troughs, or spike contacts. The spike contacts penetrate through the oxide layer formed on the raised ball contact locations. Conductive traces are provided in both rows and columns and are terminated on the inner edges of the walls of the pits formed in the substrate. This arrangement allows a system to measure the continuity across the bump pad or ball contact locations of the integrated circuit die in order to establish that each solder ball location is properly attached. This allows the system to test for the presence and quality of the bumps or balls on the particular die being tested.
A bump substrate for receiving a plurality of contact bumps on a semiconductor die during testing thereof, said bump substrate comprising:
A bump substrate for receiving a plurality of contact bumps on a semiconductor die during testing thereof, said bump substrate comprising:
A bump substrate for receiving a plurality of contact bumps on a semiconductor die during testing thereof, said bump substrate comprising:
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
Multiple probes: with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of…
Sockets for IC's or transistors: sockets for unleaded IC's having matrix type contact fields, e.g. BGA or PGA devices; Sockets for unpackaged,…
Testing of electronic circuits specially adapted for particular applications not provided for elsewhere: testing of materials or semi-finished…
Testing of integrated circuits [IC]: features relating to contacting the IC under test, e.g. probe heads; chucks
Term ended 18 Dec 2017 (estimated)
The present invention relates generally to semiconductor manufacturing and, more particularly, to methods for testing semiconductor dice having raised or bumped bond pads. More particularly still, the present invention relates to fabricating and using a testing grid suitable for testing solder balls used for bumped bond pads on an unpackaged semiconductor die.
Semiconductor dice arc being fabricated with raised bond pads and are known as bumped semiconductor die. A bumped semiconductor die includes bond pads along with bumped solderable material such as a lead-tin alloy. These typically are manufactured from solder balls made of a lead-tin alloy. Bumped dies are often used for flip chip bonding where the die is mounted face down on the substrate, such as a printed circuit board, and then the die is attached to the substrate by welding or soldering. Typically, the bumps are formed as balls of materials that are circular in a cross-sectional plane parallel to the face of the die. The bumps typically have a diameter of from 50 micrometers (μm) to 100 μm. The sides of the bumps typically bow or curve outwardly from a flat top surface. The flat top surface forms the actual region of contact with a mating electrode on the printed circuit board or other substrate. In testing the attached solder bumps, a temporary electrical connection must be made between the contact locations or bond pads on the die and the external test circuitry associated with the testing apparatus. The bond pads provide a connection point for testing an integrated circuit on the die. Likewise, the integrity of each bump must be tested as well.
In making this temporary electrical connection, it is desirable to effect a connection that causes as little damage as possible to the bumped die. If the temporary connection to the bumped bond pad damages the pad, the entire die may be ruined. This is difficult to accomplish because the connection must also produce a low resistance or ohmic contact with the bumped bond pad. A bond pad, with or without a bump, typically has a metal oxide layer formed over it that must be penetrated to make the ohmic contact.
FIG. 1 is a schematic cross-sectional diagram of a pit formed in a substrate wherein a solder ball is received;
FIG. 2 is a cross-sectional perspective schematic view of the pit according to FIG. 1;
FIG. 3 is a top plan view of an array of pits according to that of FIG. 1 having a metal interconnect in a form of rows and columns;
FIG. 1 is a cross-sectional schematic view of a bump plate 10 for testing the connect conductivity and quality of a solder ball on an unpackaged semiconductor die. Bump plate 10 is fabricated in a semiconductor substrate 12, such as, for example, silicon, gallium arsenide, or silicon on sapphire, to name a few.
A plurality of receiving pits 14 is formed in the surface of substrate 12. Pit 14 can be any desired polygonal or curved shape, but is preferred to be square with four sloped side walls 16. Each wall 16 is at an angle of 54° from horizontal, conforming to the plane of the surface of the silicon substrate that can be used in fabricating bump plate 10. After pits or suitable features are etched (formed), the surface of the plate is coated with a thin layer insulator of about 200-300 Angstroms (such as Si Oxide) before the metal traces are formed. Electrical connection for testing for the presence of the solder balls on the die is provided by metal traces 18. Metal traces 18 are made from a suitable metal and extend across the surface of substrate 12 and down walls 16 of pit 14. A solder ball or bump 20 can then be positioned within pit 14 and contact all four sloped walls 16. Ball 20 is placed within pit 14 when a die under test is mated with bump plate 10. Since a metal trace 18 is placed on each wall 16 and extends across the surface of substrate 12 to an adjacent pit 14, an applied electric current can flow through metal traces 18 provided the solder ball 20 contacts both sides of wall 16 and metal trace 18 thereon.
A method that is adaptable for manufacturing bump plate 10 is described in U.S. Pat. No. 5,592,736, “Fabricating An Interconnect For Testing Unpackaged Semiconductor Dice Having Raised Bond Pads,” commonly assigned to the same assignee as the present invention, and herein incorporated by reference for all purposes.