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US 6,486,513 B1Granted
Semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsTakuji Matsumoto, Shigenobu Maeda
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Abstract
An SOI layer is provided in a buried oxide film and a source and a drain are provided on the upper surface of the SOI layer so that they are kept from contact with the buried oxide film. A depletion layer formed by the source, the drain, and the SOI layer extends to reach the buried oxide film, so parasitic capacitance is reduced. This structure achieves an SOIMOS transistor capable of reducing junction capacitance at low drain voltage.
Claims6
A semiconductor device comprising:
- an insulating layer;
- a semiconductor layer of a first conductivity type provided on said insulating layer;
- first and second impurity regions of a second conductivity type opposite to said first conductivity type, which are provided apart from each other in an upper surface of said semiconductor layer so as to be kept from contact with said insulating layer, each of said first and second regions including a first impurity layer and a second impurity layer;
- and
- an electrode opposed to a portion of said upper surface of said semiconductor layer which is sandwiched between said first and second impurity regions, with an insulation film in between, wherein a depletion layer formed by said first impurity layer of each of said first and second regions and said semiconductor layer extends to said insulating layer without application of voltage from outside,
- wherein said first impurity layer is formed by introducing impurities of said second conductivity type into said semiconductor layer;
- and
- the following equation holds:
- ( 2 ε s / q ) · ( ( Ne + Nb ) / Ne · Nb ) · ( kT / q ) ln ( Ne · Nb / ni 2 ) ≥ t
- where t is the thickness of said semiconductor layer between said insulating layer and said first impurity layer;
- Nb is the impurity concentration of said semiconductor layer;
- Ne is the impurity concentration of said first impurity layer;
- q is the elementary charge;
- k is Boltzman's constant;
- T is the absolute temperature;
- and ni, ∈s are the intrinsic carrier concentration and the dielectric constant of said semiconductor layer and said first impurity layer.
13 more elements
A semiconductor device comprising:
- an insulating layer;
- a semiconductor layer of a first conductivity type provided on said insulating layer;
- first and second impurity regions of a second conductivity type opposite to said first conductivity type, which are provided apart from each other in an upper surface of said semiconductor layer so as to be kept from contact with said insulating layer;
- and
- an electrode opposed to a portion of said upper surface of said semiconductor layer which is sandwiched between said first and second impurity layers, with an insulation layer in between;
- and
- a third impurity layer provided apart from said semiconductor layer in an upper surface of said first impurity layer, said third impurity layer causing distortion of a band structure of said first impurity layer which is sandwiched between said third impurity layer and said semiconductor layer,
- wherein said first impurity layer is made with silicon;
- and said second impurity layer is made with silicon and germanium,
- wherein said first impurity layer is formed by introducing impurities of said second conductivity type into said semiconductor layer;
- and
- the following equation holds:
- ( 2 ε s / q ) · ( ( Ne + Nb ) / Ne · Nb ) · ( kT / q ) ln ( Ne · Nb / ni 2 ) ≥ t
- where t is the thickness of said semiconductor layer between said insulating layer and said first impurity layer;
- Nb is the impurity concentration of said semiconductor layer;
- Ne is the impurity concentration of said first impurity layer;
- q is the elementary charge;
- k is Boltzman's constant;
- T is the absolute temperature;
- and ni, ∈s are the intrinsic carrier concentration and the dielectric constant of said semiconductor layer and said first impurity layer.
17 more elements
Dependencies are inferred from the claim text.