Solid-state imaging device

A solid-state imaging device comprising:

• a semiconductor substrate including a surface region of a second conductivity type;
• and
• a plurality of unit pixels arranged in a matrix form on the surface region of the second conductivity type, the plurality of unit pixels forming an imaging area and each of the plurality of unit pixels including
• a first semiconductor region of a first conductivity type formed in a position separated by a preset distance from a surface of the surface region in a depth direction of the surface region and accumulates signal charges obtained by photo-electrical conversion of input light,
• a gate electrode formed adjacent to the first semiconductor region above the surface region and controls readout of the signal charges accumulated in said first semiconductor region, end portions of the gate electrode and the first semiconductor region which substantially face each other being formed in positions separated by a preset distance in a horizontal direction,
• a second semiconductor region of the first conductivity type formed in a channel region lying on the surface region and below the gate electrode and controls a threshold voltage of the gate electrode, and
• a third semiconductor region of the second conductivity type formed on the surface region above the first semiconductor region and an impurity concentration of which is higher than that of the channel region lying below the gate electrode,
• wherein the second semiconductor region is continuously formed from substantially an entire portion of the channel region lying below the gate electrode to a portion under the third semiconductor region and formed in contact with the first semiconductor region.

A solid-state imaging device comprising:

• a semiconductor substrate including a surface region of a second conductivity type;
• and
• a plurality of unit pixels arranged in a matrix form on the surface region of the second conductivity type, the plurality of unit pixels forming an imaging area and each of the plurality of unit pixels including a first semiconductor region of a first conductivity type which is formed in a position separated by a preset distance from a surface of the surface region in a depth direction of the surface region and accumulates signal charges obtained by photo-electrical conversion of input light, a gate electrode which is formed adjacent to the first semiconductor region above the surface region and controls readout of the signal charges accumulated in the first semiconductor region, end portions of the gate electrode and the first semiconductor region which substantially face each other being formed in positions separated by a preset distance in a horizontal direction, and a second semiconductor region of the first conductivity type which is formed in a channel region lying on an upper surface of the surface region and below the gate electrode and controls a threshold voltage of the gate electrode, the second semiconductor region being formed in a position separated from the first semiconductor region with the surface region disposed between the first and the second semiconductor region.

A solid-state imaging device comprising:

• a semiconductor substrate including a surface region of a second conductivity type;
• a plurality of unit pixels arranged in a matrix form on the surface region, the plurality of unit pixels forming an imaging area and each of the plurality of unit pixels including
• a first semiconductor region of a first conductivity type formed in a position separated by a preset distance from a surface of the surface region in a depth direction of the surface region and accumulates signal charges obtained by photo-electrical conversion of input light,
• a gate electrode formed adjacent to the first semiconductor region above the surface region and controls readout of the signal charges accumulated in the first semiconductor region,
• a fourth semiconductor region of the first conductivity type formed adjacent to the gate electrode and detects the signal charges read out by the gate electrode and transferred via a channel region below the gate electrode, a potential of the channel region below the gate electrode being set to the same potential as that of said first semiconductor region when a readout potential is supplied to the gate electrode to set the gate electrode into an ON state and the potential of the channel region is set lower than that of the fourth semiconductor region when the gate electrode is set in an OFF state, and
• a second semiconductor region of the first conductivity type formed in the channel region lying below the gate electrode and controls a threshold voltage of the channel region,
• wherein the second semiconductor region is formed in a portion of the channel region lying below the gate electrode except a partial region thereof which lies on a side of the first semiconductor region.

A solid-state imaging device comprising:

• a semiconductor substrate including a surface region of a second conductivity type;
• a plurality of unit pixels arranged in a matrix form on the surface region, the plurality of unit pixels forming an imaging area and each of the plurality of unit pixels including
• a first semiconductor region of a first conductivity type formed in a position separated by a preset distance from a surface of the surface region in a depth direction of the surface region and accumulates signal charges obtained by photo-electrical conversion of input light,
• a gate electrode formed adjacent to the first semiconductor region above the surface region and controls readout of the signal charges accumulated in the first semiconductor region,
• a fourth semiconductor region of the first conductivity type formed adjacent to the gate electrode and detects the signal charges read out by the gate electrode and transferred via a channel region below the gate electrode, a potential of the channel region below the gate electrode being set to the same potential as that of said first semiconductor region when a readout potential is supplied to the gate electrode to set the gate electrode into an ON state and the potential of the channel region is set lower than that of the fourth semiconductor region when the gate electrode is set in an OFF state,
• a second semiconductor region of the first conductivity type formed in the channel region lying below the gate electrode and controls a threshold voltage of the channel region, and
• a third semiconductor region of the second conductivity type formed on the surface region above the first semiconductor region and an impurity concentration of which is higher than that of the channel region lying below the gate electrode,
• wherein the second semiconductor region is continuously formed from substantially an entire portion of the channel region lying below the gate electrode to a portion under the third semiconductor region and formed in contact with the first semiconductor region.