Liquid crystal device, projection type display device and driving circuit
AssigneeSeiko Epson Corporation
InventorsToshiyuki Misawa, Hiroyuki Oshima
Life of this patent
Estimating the term…
Abstract
An active matrix panel including a matrix of driving electrodes couples through thin film transistor switches to a corresponding source line and gate line and at least one of a driver circuit including complementary thin film transistors for driving the source and/or gate lines of the picture elements on the substrate. The thin film transistors of the active matrix have the same cross-sectional structure as the P-type or the N-type thin film transistors forming the driver circuit and are formed during the same patterning process.
Claims41
An active matrix panel for an electro-optical device, the active matrix panel including a plurality of liquid crystal cells, data signals being supplied to the liquid crystal cells through a plurality of field effect transistors arranged in a plurality of picture elements, the active matrix panel comprising:
- a substrate having a pixel region and at least one driver region, said picture elements being arranged in said pixel region;
- driver circuits formed in the at least one driver region for driving for driving said field effect transistors, the driver circuits including plural shift registers operatively arranged to be driven at phase-shifted frequencies, each said register comprising:
- at least one clocked-inverter,
- plural unit cells extending in a predetermined direction,
- a first power source line having a first major portion extending in the predetermined direction and a plurality of first branches,
- a second power source line having a second major portion extending in the predetermined direction and a plurality of second branches, the unit cells being provided between the first power source line and the second power source line;
- and
- plural thin film regions located in each unit cell, the plurality of thin film regions including P-type polycrystalline silicon thin film regions and N-type polycrystalline silicon thin film regions, each of the first branches of the first power source line being connected to respective ones of the P-type polycrystalline silicon thin film regions and each of the second branches of the second power source line being connected to respective ones of the N-type polycrystalline silicon thin film regions, the first branches and the second branches being arranged alternately with respect to the predetermined direction, and the at least one clocked- inverter receiving a clock signal and outputting an inverted clock signal;
- a terminal operatively connected in common to the plural shift registers, the terminal generating a start signal and providing the start signal to the plural shift registers;
- plural sample hold circuits, each including a thin film transistor, each sample hold circuit connected to one of the plural shift registers;
- and
- plural lines extending along a common axis and connecting the plural sample hold circuits to the picture elements, each of the plural lines being connected to a corresponding one of the plural sample hold circuits, the number of plural lines being equal to the number of plural sample hold circuits.
A projection type display device including a light source, at least one light valve and at least one projecting optical system for projecting an image, the at least one light valve including a plurality of liquid crystal cells, data signals being supplied to the liquid crystal cells through a plurality of fields effect transistors arranged in a plurality of picture elements, the at least one light valve comprising:
- a substrate having a pixel region and at least one driver region, said picture elements being arranged in said pixel region;
- driver circuit formed in the at least one driver region for driving said field effect transistors, the driver circuit including plural shift registers operatively arranged to be driven at phase-shifted frequencies, each said shift register comprising:
- at least one clocked-inverter,
- plural unit cells extending in a predetermined direction,
- a first power source line having a first major portion extending in the predetermined direction and a plurality of first branches,
- a second power source line having a second major portion extending in the predetermined direction and a plurality of second branches, the unit cells being provided between the first power source line and the second power source line, and
- plural thin film regions located in each unit cell, the plurality of thin film regions including P-type polycrystalline silicon thin film regions and N-type polycrystalline silicon thin film regions, each of the first branches of the first power source line being connected to respective ones of the P-type polycrystalline silicon thin film regions and each of the second branches of the second power source line being connected to respective ones of the N-type polycrystalline silicon thin film regions, the first branches and the second branches being arranged alternately with respect to the predetermined direction, and the at least one clocked- inverter receiving a clock signal and outputting an inverted clock signal;
- a terminal operatively connected in common to the plural shift registers, the terminal generating a start signal and providing the start signal to the plural shift registers;
- plural sample hold circuits, each including a thin film transistor, each sample hold circuit connected to one of the plural shift registers;
- and
- plural lines extending along a common axis and connecting the plural sample hold circuits to the picture elements, each of the plural lines being connected to a corresponding one of the plural sample hold circuits, the number of plural lines being equal to the number of plural sample hold circuits.
A driving circuit for driving an active matrix panel which includes a plurality of liquid crystal cells, data signals being supplied to the liquid crystal cells through a plurality of field effect transistors arranged in a plurality of picture elements, the driving circuit comprising:
- plural shift registers operatively arranged to be driven at phase-shifted frequencies, each said shift register comprising:
- at least one clock-inverter,
- plural unit cells extending in a predetermined direction,
- a first power source line having a first major portion extending in the predetermined direction and a plurality of first branches,
- a second power source line having a second major portion extending in the predetermined direction and a plurality of second branches, the unit cells being provided between the first power source line and the second power source line, and
- plural of thin film regions located in each unit cell, the plurality of thin film regions including P-type polycrystalline silicon thin film regions and N-type polycrystalline silicon thin film regions, each of the first branches of the first power source line being connected to respective ones of the P-type polycrystalline silicon thin film regions and each of the second branches of the second power source line being connected to respective ones of the N-type polycrystalline silicon thin film regions, the first branches and the second branches being arranged alternately with respect to the predetermined direction, and the at least one clocked- inverter receiving a clock signal and outputting an inverted clock signal;
- a terminal operatively connected in common to the plural shift registers, the terminal generating a start signal and providing the start signal to the plural shift registers;
- plural sample hold circuits, each including a thin film transistor, each sample hold circuit connected to one of the sift registers;
- and
- plural lines extending along a common axis and connecting the plural sample hold circuits to the picture elements, each of the plural lines being connected to a corresponding one of the plural sample hold circuits, the number of plural lines being equal to the number of plural sample hold circuits.
A n active matrix panel for an electro-optical device, the active matrix panel including a plurality of liquid crystal cells, data signals being supplied to the liquid crystal cells through a plurality of field effect transistor arranged in a plurality of picture elements, the active matrix panel comprising:
- a substrate having a pixel region and at least one driver region, said picture elements being arranged in said pixel region;
- driver circuit formed in the at least one driver region for driving said field effect transistors, the driver circuits including plural shift registers operatively arranged to be driven at phase-shifted frequencies, each said shift register comprising:
- an inverter,
- plural unit cells extending in a predetermined direction,
- a first power source line having a first major portion extending in the predetermined direction and a plurality of first branches,
- a second power source line having a second major portion extending in the predetermined direction and a plurality of second branches, the unit cells being provided between the first power source line and the second power source line, and
- plural thin film regions located in each unit cell, the plurality of thin film regions including P-type polycrystalline silicon thin film regions and N-type polycrystalline silicon thin film regions, each of the first branches of the first power source line being connected to respective ones of the P-type polycrystalline silicon thin film regions and each of the second branches of the second power source line being connected to respective ones of the N-type polycrystalline silicon thin film regions, the first branches and the second branches being arranged alternately with respect to the predetermined direction, and the inverter receiving a clock signal and outputting an inverted clock signal;
- a terminal operatively connected in common to the plural shift registers, the terminal generating a start signal and providing the start signal to the plural shift registers;
- plural sample hold circuits, each including a thin film transistor, each sample hold circuit connected to one of the plural shift registers;
- and
- plural lines extending along a common axis and connecting the plural sample hold circuits to the picture elements, each of the plural lines being connected to a corresponding one of the plural sample hold circuits, the number of plural lines being equal to the number of plural sample hold circuits.
A projection type display device including a light source, at least one light valve and at least one projecting optical system for projecting an image, the at least one light valve including a plurality of liquid crystal cells, data signals being supplied to the liquid crystal cells through a plurality of field effect transistors arranged in a plurality of picture elements, the at least one light valve comprising:
- a substrate having a pixel region and at least one driver region, said picture elements being arranged in said pixel region;
- driver circuit formed in the at least one driver region for driving said field effect transistors, the driver circuits including plural shift registers operatively arranged to be driven at phase-shifted frequencies, each said shift register comprising:
- an inverter,
- plural unit cells extending in a predetermined direction,
- a first power source line having a first major portion extending in the predetermined direction and a plurality of first branches,
- a second power source line having a second major portion extending in the predetermined direction and a plurality of second branches, the unit cells being provided between the first power source line and the second power source line, and
- thin film regions located in each unit cell, the plurality of thin film regions including P-type polycrystalline silicon thin film regions and N-type polycrystalline silicon thin film regions, each of the first branches of the first power source line being connected to respective ones of the P-type polycrystalline silicon thin film regions and each of the second branches of the second power source line being connected to respective ones of the N-type polycrystalline silicon thin film regions, the first branches and the second branches being arranged alternately with respect to the predetermined direction, and the inverter receiving a clock signal and outputting an inverted clock signal;
- a terminal operatively connected in common to the plural shift registers, the terminal generating a start and providing the start signal to the plural shift registers;
- plural sample hold circuits, each including a thin film transistor, each sample hold circuit connected to one of the plural shift registers;
- and
- plural lines extending along a common axis and connecting the plural sample hold circuits to the picture elements, each of the plural lines being connected to a corresponding one of the plural sample hold circuits, the number of plural lines being equal to the number of plural sample hold circuits.
A driving circuit for driving an active matrix panel which includes a plurality of liquid crystal cells, data signals being supplied to the liquid crystal cells through a plurality of field effect transistor arranged in a plurality of picture elements, the driving circuit comprising:
- plural shift registers operatively arranged to be driven at phase-shifted frequencies, each said shift register comprising:
- an inverter,
- a plurality of unit cells extending in a predetermined direction,
- a first power source line having a first major portion extending in the predetermined direction and a plurality of first branches,
- a second power source line having a second major portion extending in the predetermined direction and a plurality of second branches, the unit cells being provided between the first power source line, and the second power source line, and
- plural thin film regions located in each unit cell, the plurality of thin film regions including P-type polycrystalline silicon thin film regions and N-type polycrystalline silicon thin film regions, each of the first branches of the first power source line being connected to respective ones of the P-type polycrystalline silicon thin film regions and each of the second branches of the second power source line being connected to respective ones of the N-type polycrystalline silicon thin film regions, the first branches and the second branches being arranged alternately with respect to the predetermined direction, and the inverter receiving a clock signal and outputting an inverted clock signal;
- a terminal operatively connected in common to the plural shift registers, the terminal generating a start signal and providing the start signal to the plural shift registers;
- plural sample hold circuits, each including a thin film transistor, each sample hold circuit connected to one of the plural shift registers;
- and
- plural lines extending along a common axis and connecting the plural sample hold circuits to the picture element, each of the plural lines being connected to a corresponding one of the plural sample hold circuits, the number of plural lines being equal to the number of plural sample hold circuits.
An electric view finder device including an active matrix panel and a light source for illuminating the active matrix panel, the active matrix panel including a plurality of liquid crystal cells, data signals being supplied to the liquid crystal cells through a plurality of field effect transistors arranged in a plurality of picture elements, the active matrix panel comprising:
- a substrate having a pixel region and at least one driven region, said picture elements being arranged in said pixel region;
- and
- driver circuit formed in the at least one driver region for driving said field effect transistors, the driver circuit including plural shift registers operatively arranged to be driven at phase-shifted frequencies, each said shift register comprising:
- at least one clocked-inverter,
- plural unit cells extending in a predetermined direction,
- a first power source line having a first major portion extending in the predetermined direction and a plurality of first branches,
- a second power source line having a second major portion extending in the predetermined direction and a plurality of second branches, the unit cells being provided between the first power source line and the second power source line, and
- plural thin film regions located in each unit cell, the plurality of thin film regions including P-type polycrystalline silicon thin film regions and N-type polycrystalline silicon thin film regions, each of the first branches of the first branches of the first power source line being connected to respective ones of the P-type polycrystalline silicon thin film regions and each of the second branches of the second power source line being connected to respective ones of the N-type polycrystalline silicon thin film regions, the first branches and the second branches being arranged alternately with respect to the predetermined direction, and the at least one clocked-inverter receiving a clock signal and outputting an inverted clock signal;
- a terminal operatively connected in common to the plural shift registers, the terminal generating a start signal and providing the start signal to the plural shift registers;
- plural sample hold circuits, each including a thin film transistor, each sample hold circuit connected to one of the plural shift registers;
- and
- plural lines extending along a common axis and connecting the plural sample hold circuits to the picture elements, each of the plural lines being connected to a corresponding one of the plural sample hold circuits, the number of plural lines being equal to the number of plural sample hold circuits.
An electric view finder device including an active matrix panel and a light source for illuminating the active matrix panel, the active matrix panel including a plurality of liquid crystal cells, data signals being supplied to the liquid crystal cells through a plurality of field effect transistors arranged in a plurality of picture elements the active matrix panel comprising:
- a substrate having a pixel region and at least one driver region, said picture elements being arranged in said pixel region;
- and
- driver circuit formed in the at least one driver region for driving said field effect transistors, the driver circuit including plural shift registers operatively arranged to be driven at phase-shifted frequencies, each said shift register comprising:
- an inverter,
- plural unit cells extending in a predetermined direction,
- a first power source line having a first major portion extending in the predetermined direction and a plurality of first branches,
- a second power source line having a second major portion extending in the predetermined direction and a plurality of second branches, the unit cells being provided between the first power source line and the second power source line, and
- plural thin film regions located in each unit cell, the plurality of thin film regions including P-type polycrystalline silicon thin film regions and N-type polycrystalline silicon thin film regions, each of the first branches of the first power source line being connected to respective ones of the P-type polycrystalline silicon thin film regions and each of the second branches of the second power source line being connected to respective ones of the N-type polycrystalline silicon thin film regions, the first branches and the second branches being arranged alternately with respect to the predetermined direction, and the inverter receiving a clock signal and outputting an inverted clock signal;
- a terminal operatively connected in common to the plural shift registers, the terminal generating a start signal and providing the start signal to the plural shift registers;
- plural sample hold circuits, each including a thin film transistor, each sample hold circuit connected to one of the plural shift registers;
- and
- plural lines extending along a common axis and connecting the plural sample hold circuits to the picture elements, each of the plural lines being connected to a corresponding one of the plural sample hold circuits, the number of plural lines being equal to the number of plural sample hold circuits.
A driving circuit for driving an active matrix panel that includes plural liquid crystal cells, data signals being supplied to the liquid crystal cells through a plurality of thin film transistors arranged in a plurality of picture elements, the driving circuit comprising:
- plural shift registers including a first shift register and a second shift register, the first shift register and the second shift register each including a thin film transistor, and the first shift register and the second shift register operatively arranged to be driven at phase-shifted frequencies;
- a common terminal operatively connected to the first shift register and the second shift register, the common terminal generating a start signal and providing the start signal to the first shift register and the second shift register;
- plurality of sample hold circuits, each sample hold circuit of the plurality including a thin film transistor, and each sample hold circuit of the plurality being connected to one of the first and the second shift registers;
- and
- plural lines extending along a common axis and connecting the plural sample hold circuits to the picture elements, each of the plural lines being connected to a corresponding one of the plural sample hold circuits, the number of plural lines being equal to the number of plural sample hold circuits.
An active matrix panel for an electro-optical device, data signals being supplied to a plurality of field effect transistors arranged in a plurality of picture elements, the active matrix panel comprising:
- a substrate having a pixel region and at least one drive region, said picture elements being arranged in said pixel region;
- driver circuits formed in the at least one drive region for driving said field effect transistors, at least one of the drive circuits including plural shift registers operatively arranged to be driven at phase shifted frequencies;
- plural sample hold circuits, each including a thin film transistors, each sample hold circuit connected to one of the plural shift registers;
- and
- a common terminal operatively connected to the plural shift registers, the common terminal generating a start signal and providing the start signal to the plural shift registers.
Dependencies are inferred from the claim text.