Memory device having memory cells capable of four states
AssigneeHewlett-Packard Company
InventorsManish Sharma, Lung T. Tran
Life of this patent
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Abstract
A memory device includes memory cells having a re-writeable element and a write-once element in series with the re-writeable element. The re-writeable element is programmable between a high resistance state and a low resistance state. The write-once element can be an anti-fuse element that is programmable from a high resistance state to a low resistance state, or a fuse element that is programmable from a low resistance state to a high resistance state. The two possible states for the re-writeable element and the two possible states for the write-once element allow the memory cells to store four different bits.
Claims18
A memory array, comprising:
- a plurality of memory cells;
- a plurality word lines coupled to the memory cells;
- and
- a plurality of bit lines coupled to the memory cells, wherein the word lines cross the bit lines at the memory cells, and wherein a memory cell comprises:
- a write-once element;
- and
- a re-writeable element in series with the write-once element.
A method of programming a selected memory cell in a memory array, the memory array comprising an array of memory cells, a plurality of word lines coupled to the memory cells, and a plurality of bit lines coupled to the memory cells, a memory cell comprising a first programmable write-once element and a second programmable re-writeable element in series with the first element, the method comprising:
- programming the selected memory cell to one of four states, each state corresponding to a different resistance of the selected memory cell, wherein the step of programming comprises:
- applying at least one of a write voltage and a write current to the write-once element;
- and
- applying write currents to the word and bit line crossing at the selected memory cell.
Dependencies are inferred from the claim text.