Semiconductor device and method of manufacturing the same
AssigneeKabushiki Kaisha Toshiba
InventorsKatsuhiko Hieda, Kyoichi Suguro
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AssigneeKabushiki Kaisha Toshiba
InventorsKatsuhiko Hieda, Kyoichi Suguro
Estimating the term…
Disclosed is a semiconductor device comprising a transistor structure including an epitaxial silicon layer formed on a main surface of an n-type semiconductor substrate, source-drain diffusion layers formed on at least the epitaxial silicon layer, a channel region formed between the source and drain regions, and a gate electrode formed on the channel region with a gate insulating film interposed therebetween, an element isolation region being sandwiched between adjacent transistor structures, wherein a punch-through stopper layer formed in a lower portion of the channel region has an impurity concentration higher than that of the channel region, and the source-drain diffusion layers do not extend to overlap with edge portion of insulating films for the element isolation.
A method of manufacturing a semiconductor device, comprising:
A method of manufacturing a semiconductor device comprising:
Dependencies are inferred from the claim text.