Balanced clock placement for integrated circuits containing megacells
AssigneeLSI Logic Corporation
InventorsAlexander Tetelbaum, Rajiv Kapur
Life of this patent
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Abstract
A method of clock buffer placement for minimizing clock skew for an integrated circuit includes the steps of (a) finding an ideal location for a clock buffer on an integrated circuit that minimizes clock skew, (b) checking whether the ideal clock buffer location overlaps a megacell, and (c) finding a location for the clock buffer that is closest to the ideal clock buffer location and that does not overlap a megacell.
Claims6
A method of clock buffer placement for minimizing clock skew in an integrated circuit having megacells that includes the steps of:
- (a) finding an ideal location for a clock buffer on an integrated circuit that minimizes clock skew;
- (b) checking whether the ideal clock buffer location overlaps a megacell;
- and
- (c) finding a location for the clock buffer that is closest to the ideal clock buffer location and that does not overlap a megacell.
A method of clock buffer placement for minimizing clock skew in an integrated circuit having megacells comprising the steps of:
- (a) finding an ideal clock buffer location on a clock tree that minimizes clock skew;
- (b) checking whether the ideal clock buffer location overlaps a megacell;
- (c) finding a set of megacells that are accessible by a common adjacent side to an overlapped megacell;
- (d) defining a megacell boundary that encloses the set of megacells;
- (e) finding an initial location where the clock buffer may be placed without overlapping a megacell;
- (f) storing the initial location in memory;
- (g) finding the next available location where the clock buffer may be placed without overlapping a megacell;
- (h) checking whether the next available location is closer to the ideal clock buffer location than the location stored in memory;
- (i) replacing the location stored in memory with the next available location found in step (g);
- (j) checking whether every available location has been compared with the ideal clock buffer location;
- (k) retrieving the location stored in memory;
- and
- (l) placing the clock buffer at the retrieved location.
A computer program product comprising:
- a medium for embodying a computer program for input to a computer;
- and
- a computer program embodied in the medium for causing the computer to perform at least one of the following functions:
- (a) finding an ideal clock buffer location on a clock tree that minimizes clock skew;
- (b) checking whether the ideal clock buffer location overlaps a megacell;
- (c) finding a set of megacells that are accessible by a common adjacent side to an overlapped megacell;
- (d) defining a megacell boundary that encloses the set of megacells;
- (e) finding an initial location where the clock buffer may be placed without overlapping a megacell;
- (f) storing the initial location in memory;
- (g) finding the next available location where the clock buffer may be placed without overlapping a megacell;
- (h) checking whether the next available location is closer to the ideal clock buffer location than the location stored in memory;
- (i) replacing the location stored in memory with the next available location found in step (g);
- (j) checking whether every available location has been compared with the ideal clock buffer location;
- (k) retrieving the location stored in memory;
- and
- (l) placing the clock buffer at the retrieved location.
Dependencies are inferred from the claim text.