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US 6,480,948 B1Granted
Configurable system memory map
AssigneeCirrus Logic, Inc.
InventorsBalaji V. Virajpet, Kaushik L. Popat
Life of this patent
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AssigneeCirrus Logic, Inc.
InventorsBalaji V. Virajpet, Kaushik L. Popat
Estimating the term…
A memory map for a computer system is configurable. For example a first section of the memory map (e.g., the lower address space) is configurable so that when the process accesses this section, different devices will respond depending on the memory map in effect. In one embodiment, external non-volatile memory is accessed during a first time period based on a reset memory map. After initialization, the memory may is changed to a normal one so that subsequent accesses to the same section of the memory map result in accesses to faster memory (e.g., internal SRAM). In the case where the reset vector and interrupt vectors have relatively close addresses, the configurability of the memory map allows the reset vector to be handled through accesses to non-volatile memory while interrupt vectors are handled through accesses to faster internal SRAM.
A computer system comprising:
A method of controlling a computer system including a processor, a plurality of devices accessible by said processor via one or more addresses and a bus controller coupled to said processor and said plurality of devices wherein a first device is accessible by said processor via a first subset of addresses in said memory map and a second device is accessible by said processor via a second subset of addresses in said memory map, the method comprising:
A computer system comprising:
Dependencies are inferred from the claim text.