Memory address interleaving and offset bits for cell interleaving of memory
AssigneeHewlett-Packard Company
InventorsRobert C. Douglas, Kent A. Dickey
Life of this patent
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AssigneeHewlett-Packard Company
InventorsRobert C. Douglas, Kent A. Dickey
Estimating the term…
A method provides for interleaved access of a contiguous logical address space formed by a plurality of memories having respective overlapping address spaces. The memories are organized into memory segments, memory segments of equal size from different memories arranged or organized into interleave groups. An initial largest interleave group is selected and a corresponding first interleave entry is generated in a table. The interleave entry maps a corresponding initial logical address space into each of the memory segments corresponding to the first interleave group. A total memory size included thus far in the table is calculated and successive next larger groups that are integer divisors of the total memory, i.e., the partial sums formed by groups selected thus far. These steps are repeated until all of the contiguous logical address space has been mapped onto the memories. A mask may be used to extract portions from a logical address to index into a table mapping the logical address space onto the memories. Another portion of the logical address includes a memory offset.
An interleaved method of accessing, as a contiguous logical address space, a plurality of m memories organized into memory segments, the method comprising the steps of:
A method of mapping a contiguous logical address space into a plurality of memories organized into uniform size memory segments, the method comprising the steps of:
A system for mapping a contiguous logical address space into a plurality of memories organized into uniform size memory segments, said system comprising:
Dependencies are inferred from the claim text.