Storing apparatus having a dynamic buffer for random or sequential access
AssigneeFujitsu Limited
InventorsAkira Ban, Hiroshi Ichii
Life of this patent
Estimating the term…
Abstract
When a write access is received from an upper apparatus, a cache control unit develops write data into a data buffer area in a memory, notifies the upper apparatus of a normal end, and thereafter, writes the write data developed into the data buffer area onto a storing medium. An access kind discriminating unit analyzes whether the write access from the host is a sequential access or a random access. A buffer construction control unit selects a data buffer construction of the optimum number of sections in accordance with an access kind and executes the caching operation.
Claims17
A storing apparatus comprising:
- a cache control unit for, when a write access is received from an upper apparatus, caching write data into a data buffer area in a memory, notifying said upper apparatus of a normal end, and thereafter, writing the write data cached in said data buffer area onto a storing medium;
- an access kind discriminating unit for discriminating whether the write access from said upper apparatus is a random access in which write addresses are discontinuous or a sequential access in which the write addresses are continuous;
- and
- a buffer construction control unit for setting a random corresponding buffer construction which enables a buffer development and a medium writing that are suitable for said random access or a sequential corresponding buffer construction which enables a buffer development and a medium writing that are suitable for said sequential access, for changing the buffer construction to said sequential corresponding buffer construction when said sequential access is decided in a setting state of said random corresponding buffer construction, and for changing the buffer construction to said random corresponding buffer construction when said random access is decided in a setting state of said sequential corresponding buffer construction;
- wherein said access kind discriminating unit further sets an ascending order mode for an ascending order access in which a present address is increased from a previous address and sets a descending order mode for a descending order access in which the present address is decreased from the previous address, and said cache control unit caches the write data from a head position in a buffer section by an ascending order in said ascending order mode and caches the write data from an end position in the buffer section by a descending order in said descending order mode.
A storing apparatus comprising:
- a data buffer area on a memory in which a random corresponding buffer construction which enables a buffer development and a medium writing that are suitable for a random write access has been fixedly set;
- a cache control unit for, when an access is received from an upper apparatus caching write data into said data buffer area in said memory, notifying said upper apparatus of a normal end, and thereafter, writing the write data cached in said data buffer area onto a storing medium;
- and
- an access kind discriminating unit for setting an ascending order mode for an ascending order access in which a present address is increased from a previous address and setting a descending order mode for a descending order access in which the present address is decreased from the previous address,
- wherein said cache control unit caches the write data from a head position in a buffer section by the ascending order in said ascending order mode and caches the write data from an end position in the buffer section by the descending order in said descending order mode.
A storing apparatus comprising:
- a data buffer area on a memory in which a sequential corresponding buffer construction which enables a buffer development and a medium writing that are suitable for a sequential write access has been fixedly set;
- a cache control unit for, when an access is received from an upper apparatus, caching write data into said data buffer area in said memory, notifying said upper apparatus of a normal end, and thereafter, writing the write data cached in said data buffer area onto a storing medium;
- and
- an access kind discriminating unit for setting an ascending order mode for an ascending order access in which a present address is increased from a previous address and setting a descending order mode for a descending order access in which the present address is decreased from the previous address,
- wherein said cache control unit caches the write data from a head position in a buffer section by the ascending order in said ascending order mode and caches the write data from an end position in the buffer section by the descending order in said descending order mode.
A storing apparatus comprising:
- a cache control unit for, when a write access is received from an upper apparatus, caching write data into a data buffer area in a memory, notifying said upper apparatus of a normal end, and thereafter, writing the write data cached in said data buffer area onto a storing medium;
- an access kind discriminating unit for discriminating whether the write access from said upper apparatus is a random access in which write addresses are discontinuous or a sequential access in which the write addresses are continuous;
- and
- a buffer construction control unit for setting a random corresponding buffer construction which enables a buffer development and a medium writing that are suitable for said random access or a sequential corresponding buffer construction which enables a buffer development and a medium writing that are suitable for said sequential access, for changing the buffer construction to said sequential corresponding buffer construction when said sequential access is decided in a setting state of said random corresponding buffer construction, and for changing the buffer construction to said random corresponding buffer construction when said random access is decided in a setting state of said sequential corresponding buffer construction;
- wherein in the setting state of said sequential corresponding buffer construction, when the number of times of said random access reaches a specified number of times, said buffer construction control unit changes the buffer construction of said data buffer area from said sequential corresponding buffer construction to said random corresponding buffer construction.
Dependencies are inferred from the claim text.