Storage control unit and method for handling data storage system using thereof

A method for a data storage system, having one or more of memory device(s), a host device, and a memory controller for controlling transfer of data stored in said memory device(s) responding to an instruction from said host device, the memory controller being connected to an interface for use in connection with said host device in a route which has been standing in advance between said memory device(s) and said host device logically and connects to said host device and said memory controller logically, comprising:

• adding a new memory controller into said data storage system during on-line operation thereof;
• executing an initialization process of said route;
• and
• obtaining information for said host computer to identify the memory controller having been standing in advance, uniquely, by said new memory controller, the new memory controller, thereby sharing processing capability with said memory controller having been standing in advance.

A memory controller, the memory controller being connectable to a data storage system during an on-line operation, the data storage system including a host device, a storage means including one or more memory device, and a second memory controller, the memory controller capable of being added into logically standing between said host device and said storage means and comprising:

• connection means connectable to an interface used for connection with said host device in a route being logically connected to said host device;
• an internal memory for storing control information of a logical unit of said memory device(s) which is stored in said second memory controller already standing between said host device and said storage means;
• and
• means for controlling transfer of data stored in said memory device(s) depending upon an instruction from said host device,
• wherein the memory controller is identified by either one of a tool being operative on said host device and said second memory controller, the memory controller thereby sharing processing capability with said second memory controller.