Information routing for transfer buffers
AssigneeInternational Business Machines Corporation
InventorsDaniel Frank Moertl, Danny Marvin Neal, Steven Mark Thurber, Adalberto Guillermo Yanes
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AssigneeInternational Business Machines Corporation
InventorsDaniel Frank Moertl, Danny Marvin Neal, Steven Mark Thurber, Adalberto Guillermo Yanes
Estimating the term…
A method and implementing system are provided in which multiple nodes of a PCI bridge/router circuit are connected to corresponding plurality of PCI busses to enable an extended number of PCI adapters to be connected within a computer system. An exemplary PCI-to-PCI router (PPR) circuit includes the arbiters as well as PPR buffers for temporarily storing transaction-related information passing through the router circuit between adapters on the PCI busses and/or between PCI adapters and the CPUs and system memory or other system devices. A buffer re-naming methodology is implemented to eliminate internal request/completion transaction information transfers between bridge buffers thereby increasing system performance.
A bridge circuit for connecting a primary bus to a plurality of secondary busses, said bridge circuit comprising:
A bridge circuit for connecting a primary bus to a plurality of secondary busses, said bridge circuit comprising:
A method for processing an information transfer transaction, said transaction including an information transfer request and an information transfer completion, said information transfer transaction being routed through a bridge circuit, said bridge circuit including a plurality of buffer devices for storing said information transfer request and said information transfer completion, said method comprising:
An information processing system comprising:
A bridge circuit for connecting a primary bus to a plurality of secondary busses, said bridge circuit comprising:
Dependencies are inferred from the claim text.