Method and apparatus for determining the number of empty memory locations in a FIFO memory device
AssigneeSTMicroelectronics S.r.l.
InventorRoozbeh Safi
Life of this patent
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Abstract
A first-in first-out (FIFO) memory device includes a plurality of memory locations having sequential binary addresses, a write address pointer for sequentially accessing the memory locations to write data therein, and a read address pointer for sequentially accessing the memory locations for reading data therefrom. The method and apparatus add an inverted write binary address of the write address pointer to a read binary address of the read address pointer, add one, and discard the most significant bit (MSB) to define the number of empty memory locations.
Claims33
A method for determining a number of empty memory locations in a first-in first-out (FIFO) memory device including a plurality of memory locations having sequential binary addresses, a write address pointer for sequentially accessing the memory locations to write data therein, and a read address pointer for sequentially accessing the memory locations for reading data therefrom, the method comprising:
- determining a read binary address R of the read address pointer and a write binary address W of the write address pointer;
- inverting the write binary address W to generate an inverted write binary address Winv;
- adding Winv, R and one to produce a first binary value;
- discarding a most significant bit (MSB) of the first binary value to define a second binary value;
- and
- determining the number of empty memory locations based upon the second binary value.
A method for determining a number of empty memory locations in a first-in first-out (FIFO) memory device including a plurality of memory locations, and having a write address pointer at a write binary address W, and a read address pointer at a read binary address R, the method comprising:
- inverting the write binary address W to generate an inverted write binary address Winv;
- adding the read binary address R and the inverted write binary address Winv;
- and
- determining the number of empty memory locations based upon the sum of R and Winv.
A first-in first-out (FIFO) memory device comprising:
- a plurality of memory locations having
- a sequential binary addresses;
- a write address pointer for sequentially accessing the memory locations to write data therein;
- a read address pointer for sequentially accessing the memory locations for reading data therefrom;
- and
- a logic circuit for receiving a read binary address R of the read address pointer and a write binary address W of the write address pointer, inverting the write binary address W to generate an inverted write binary address Winv, adding Winv to R, and outputting the number of empty memory locations based upon the sum of Winv and R.
A logic circuit for determining a number of empty memory locations of a first-in first-out (FIFO) memory device comprising a plurality of memory locations, a write address pointer at a write binary address W, and a read address pointer at a read binary address R, the logic circuit comprising:
- an inverter for inverting the write binary address W to generate an inverted write binary address Winv;
- and
- an adder including
- a first input connected to the inverter for receiving the inverted write binary address Winv,
- a second input for receiving the read binary address R, and
- an output for outputting the number of empty memory locations.
Dependencies are inferred from the claim text.