Apparatus and method for testing the wait signal line of a communication interface socket
AssigneeInventec Corporation
InventorsTong S Chen, Kuang Shin Lin, Xue-Ning Ren
Life of this patent
Estimating the term…
Abstract
The present invention relates to an apparatus and method for testing the WAIT signal line of a communication interface socket to detect whether the WAIT signal line of the socket, such as a PCMCIA socket, can work properly. The present invention utilizes an electrical switch and several status signal lines, such as IOWR and IN signal lines, to identify the status of the WAIT signal line and detect whether the WAIT signal line works properly according to the status signal lines being in a HIGH state or a LOW state.
Claims13
An apparatus for testing the WAIT signal line of a communication interface socket, comprising:
- a socket connection interface, which is used to connect to the communication interface socket for the testing of the signal lines;
- a group of status signal lines, which comprises IOWR and IN signal lines for identifying the status of the WAIT signal line;
- an electrical switch, which is used to connect the IOWR signal line with the IN signal line so that the status of the IOWR signal line can be represented by that of the IN signal line;
- and
- a group of switch control lines, which comprises several signal lines for enabling/disabling the electrical switch.
A method for testing the WAIT signal line of a communication interface socket, comprising the following steps:
- enabling the electrical switch;
- executing an I/O write operation to change the status of the IOWR signal line;
- connecting the IN signal line with the IOWR signal line;
- detecting the statuses of the IN signal line and the IOWR signal line;
- checking the delay time of the IN signal line;
- and
- showing the status of the WAIT signal line according to the detection results.
A method for testing the WAIT signal line of a communication interface socket, comprising the following steps:
- enabling the electrical switch;
- executing an I/O write operation to change the status of the IOWR signal line into a LOW state;
- connecting the IN signal line with the IOWR signal line so that the status of the IOWR signal line can be represented by that of the IN signal line;
- detecting the statuses of the IN signal line and the IOWR signal line;
- checking whether the IN signal line always keeps in a LOW state for the 12 us of delay;
- and
- showing the status of the WAIT signal line according to the detection results.
Dependencies are inferred from the claim text.