Concurrent programming apparatus with status detection capability
AssigneeBP Microsystems
InventorWilliam H. White
Life of this patent
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AssigneeBP Microsystems
InventorWilliam H. White
Estimating the term…
A computer controlled group of programmer sites are provided to burn in or enter operating code into various types of programmable electronic devices, such as programmable memories, programmable logic devices (or PLD's), field programmable gate arrays (or FPGA's), and the like. The programmer sites are conned to a central controller and operate under control of the central controller, typically personal computer. Each programmer site includes its own computer processor or CPU. Initially for a production run of a particular type of device, one of the programmer sites serves as a master site. At the master site, an optimized control sequence for the device is developed in conjunction with the central controller. Once this is achieved, the optimal sequence is broadcast to all programmer sites connected to the central controller. Thereafter, each programmer site, including the former master site, operates autonomously to program the devices independently of the status of the other sites, while the central computer scans each of the network sites in a timed sequence and provides monitoring and reporting functions.
A programming station for inclusion into a network with a control computer for automated transfer of a data pattern into a programmable electronic device selected from the group consisting of a programmable logic device, a programmable array logic device, a programmable read-only memory, a field programmable gate array, and a programmable microcontroller, comprising:
An apparatus for automated transfer of a data pattern into a plurality of programmable electronic devices selected from the group consisting of a programmable logic device, a programmable array logic, a programmable read-only memory, a field programmable gate array and a programmable microcontroller, comprising:
An apparatus for automated transfer of a data pattern into one or more programmable electronic devices selected from the group consisting of a programmable logic device, a programmable array logic, a programmable read-only memory, a field programmable gate array and a programmable microcontroller, comprising:
An apparatus for automated transfer of a data pattern into a programmable electronic device selected from the group consisting of a programmable logic device, a programmable array logic, a programmable read-only memory, a field programmable gate array, and a programmable microcontroller, comprising:
Dependencies are inferred from the claim text.
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Multiple-port networks: frequency selective two-port networks
Programming or data input circuits: external programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
Impedance networks
Static stores
Term ended 2 Jan 2016 (estimated)
1. Field of Invention
The present invention relates to automated transfer or programming of operating codes and data into programmable electronic devices.
2. Description of Prior Art
A better understanding of the present invention can be obtained when the following detailed description of the preferred embodiment is considered in conjunction with the following drawings, in which:
FIG. 1 is a block diagram illustrating a concurrent programming system according to the preferred embodiment of the present invention;
FIG. 2 is a block diagram illustrating a device programming site of the concurrent programming system of FIG. 1 according to the preferred embodiment;
Referring now to FIG. 1, there is illustrated a concurrent programming system S according to the preferred embodiment. The concurrent programming system S comprises a plurality of programming sites 100 each connected to a central controller 102. The programing sites 100 are independent but conveniently grouped together into a single unit, called a programming station 104 for operation by a single user. A number of programming stations 104 can be connected to the central controller 102 if further capacity is desired, with each programming station 104 operable by single or multiple users.
The central controller 102 is conveniently a conventional International Business Machines (IBM) compatible personal computer (PC) including a display 106 and input device 108 for accepting input from a user and providing visual and optional audio status. Alternatively, other standard or proprietary computers capable of remote communications and user interaction may be used. The PC is preferred since it is widely available and provides a standard platform for software to operate. It is contemplated that the central controller 102 could alternatively be integrated as part of the programming station 104, in which case smaller forms of the input device 108 and display 106 would be used, such as a liquid crystal display (LCD) and keypad. The central controller 102 connects to the programming sites 100 via a bidirectional parallel port, although any serial or parallel communications scheme is adequate. In an alternative embodiment, the programming stations 104 are connected to a conventional computer network, such as Ethernet or Token Ring, with each programming site 100 being a network node.
Each programming site 100 includes identical logic and features, which are more fully described below. Each programming site is capable of programming a variety of programmable devices, such as Programmable Logic Devices (PLDs), Programmable Array Logic (PAL®) devices, Programmable Read-Only Memories (PROMs, OTP PROMs, EPROMs, EEPROMs, FLASH memories, etc.), Field Programmable Gate Arrays (FPGAs), programmable microcontrollers and other devices containing a programmable element. All types of package types are supported by an interchangeable receptacle (discussed below).