Algorithm (Method) and VLSI architecture for fast evaluation of trigonometric functions

Abstract

A fast CORDIC algorithm and the resulting VLSI architecture for the evaluation of trigonometric functions are disclosed. The new method employs signed digits to represent intermediate operands and requires a constant scaling or normalization factor which can be pre-computed and made available in read-only hardware for any desired target precision (i.e., word length). The speedup is achieved by performing CORDIC iterations in parallel in two separate modules. Each module executes a “double step” or two basic CORDIC rotations at every iteration cycle. Two angles arctan 2−2i and arctan 2−(2i+1) are used in each step i of the method. As a result, approximately {fraction (n/2)} steps (exactly ⌈ n + 3 2 ⌉ steps) are required to evaluate sine/cosine of n bit input argument up to n bits of accuracy. The VLSI architecture consists of two “zeroing” and two “rotator” modules, each consisting of signed digit adders, latches, shifters, etc. A novel decision block controls the iterations. The new ROM look-up table stores ⌈ n + 3 2 ⌉ values, each accurate to n+3 bits. For every pair of consecutive angles arctan 2−2i and arctan 2−(2i+1) for i=0, 1, 2, . . . , ⌈ n + 3 2 ⌉ only their sum and difference need be stored for the inventive double step branching CORDIC method. The result is a very fast VLSI architecture whose speedup to hardware-overhead ratio is close to 1. The double stepping method can be easily extended to the evaluation of inverse trigonometric, exponential as well as logarithm functions.

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