US 6,480,815 B1 · Path dependent power modeling

Abstract

A system and method for modeling the power consumed by a logic cell in a computer controlled power estimation process estimating the power consumed for an integrated circuit represented by logic cells and connections between cells. The present invention models power consumption within a logic cell associated with a particular designated pin (output, internal, or bidirectional) based on which input (or internal or bidirectional) pin transitioned causing the designated pin to transition. This is referred to as path dependent power modeling. A different power consumption value can be provided for each different modeled transition. The logic cells and the power consumption model for them are stored in a logic cell “library” within the computer system. Path dependent power modeling of the present invention allows library designers to specify a different set of power values depending on which pin transition (e.g., input pin) caused the designated pin to transition. Specifically, library designers are allowed to specify multiple internal power tables for each output with different “related_pins” fields. To take advantage of the path dependent power modeling, library designers can specify multiple power tables in the library cell with different sets of related_pins. Path dependent power modeling is important for those cells for which the path of the toggle makes the cell consume more or less power than the otherwise recorded “average” power rating used in conventional libraries. One example is the set/reset (SR) flip-flop.

Claims13

Dependent claims

A computer-readable medium having stored therein computer-readable program codes that when executed cause a computer system to perform a method of providing a power consumption model for a physical circuit of an integrated circuit device, said method comprising the steps of:

a) identifying a set of signal pins for a library cell representative of said physical circuit and storing said set of signal pins into a memory;
b) designating at least one output signal pin of said library cell and storing a signal pin designation thereof into said power consumption model of said library cell within said memory;
c) associated with said designated output signal pin, defining a first set of signal pins, wherein a transition on one signal pin of said first set causes said designated output signal pin to transition and wherein said first set contains more than one signal pins;
d) associated with said designated output signal pin, defining a first power consumption function representative of power consumed by said physical circuit when a transition on one signal pin of said first set causes said designated output signal pin to transition, said first power consumption function also representative of power consumed by said physical circuit when a transition on another signal pin of said first set causes said designated output signal pin to transition;
and
e) storing said first power consumption function and said first set into said power consumption model for said library cell of said memory.

3 more elements

a) identifying a set of signal pins for a library cell representative of said physical circuit and storing said set of signal pins into a memory;
b) designating at least one output signal pin of said library cell and storing a signal pin designation thereof into said power consumption model of said library cell within said memory;
c) associated with said designated output signal pin, defining a first set of signal pins wherein said first set contains one or more signal pins;
d) associated with said designated output signal pin, defining a first power consumption function representative of power consumed by said physical circuit when a transition on one signal pin of said first set causes said designated output signal pin to transition,
e) storing said first power consumption function and said first set into said power consumption model for said library cell of said memory.
f) associated with said designated output signal pin, defining a second set of signal pins wherein said second set contains one or more signal pins;
g) associated with said designated output signal pin, defining a second power consumption function representative of power consumed by said physical circuit when a transition on one signal pin of said second set causes said designated output signal pin to transition;
and
h) storing said second power consumption function and said second set into said power consumption model for said library cell of said memory.

6 more elements

Dependencies are inferred from the claim text.

Path dependent power modeling

Life of this patent

Path dependent power modeling

Life of this patent

Abstract

Claims13