Method and system for generating self-testing and random input stimuli for testing digital systems
AssigneesInternational Business Machines Corporation, Motorola, Inc.
InventorsRobert F. Molyneaux, Rajesh Raina
Life of this patent
Estimating the term…
Abstract
The invention is a method and apparatus that verifies the design of electronic circuitry containing a function to be tested. An input, such as a random input, is provided to the electronic circuitry containing the function, yielding an output. This output, in turn, is used as input (denominated “inverse input”) to an inverse of the function to be tested. The resulting output (termed “inverse output”) is compared to the original input to the function to be tested to facilitate verification of the design of the circuitry.
Claims25
A test method that verifies the design and functionality of electronic circuitry, said electronic circuitry comprising a function to be tested, said test method comprising:
- providing an input to the electronic circuitry, wherein the function to be tested generates an output corresponding to said input;
- providing an inverse input to the inverse of the function to be tested, said inverse input comprising the output, wherein the inverse of the function to be tested generates an inverse output corresponding to said inverse input;
- and
- generating an error notification when comparison of said inverse output of the inverse of the function to be tested and said input does not yield an expected result.
A method of verifying the design and functionality of electronic circuitry, said electronic circuitry comprising a function to be tested, said method comprising:
- generating one or more inputs to the function to be tested and stimulating the electronic circuitry comprising the function to be tested, wherein the function to be tested generates an output corresponding to said one or more inputs;
- generating one or more inverse inputs to the inverse of the function to be tested, said inverse inputs comprising the output, and stimulating electronic circuitry comprising the inverse of the function to be tested, wherein the inverse of the function to be tested generates an inverse output corresponding to said one or more inverse inputs;
- and
- generating an error notification when comparison of said inverse output of the inverse of the function to be tested and said input does not yield an expected result.
A test apparatus that verifies the design and functionality of electronic circuitry, said electronic circuitry comprising a function to be tested, said test apparatus comprising:
- an input to the electronic circuitry, wherein the function to be tested generates an output corresponding to said input;
- an inverse input to the inverse of the function to be tested, said inverse input comprising the output, wherein the inverse of the function to be tested generates an inverse output corresponding to said inverse input;
- and
- an error notification when comparison of said inverse output of the inverse of the function to be tested and said input does not yield an expected result.
A system that verifies the design and functionality of electronic circuitry, said electronic circuitry comprising a function to be tested, said system comprising:
- an input to the electronic circuitry, wherein the function to be tested generates an output when stimulated by said input;
- an inverse input to the inverse of the function to be tested, said inverse input comprising the output, wherein the inverse of the function to be tested generates an inverse output when stimulated by said inverse input;
- and
- an error notification when comparison of said inverse output of the inverse of the function to be tested and said input does not yield an expected result.
A program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine to perform a method of verifying the design and functionality of electronic circuitry, said electronic circuitry comprising a function to be tested, said method comprising:
- generating one or more in puts to the function to be tested and stimulating the electronic circuitry comprising the function to be tested, wherein the function to be tested generates an output corresponding to said one or more inputs;
- generating one or more inverse inputs to the inverse of the function to be tested, said inverse inputs comprising the outputs, and stimulating electronic circuitry comprising the inverse of the function to be tested, wherein the inverse of the function to be tested generates an inverse output corresponding to said one or more inverse inputs;
- and
- generating an error notification when comparison of said inverse output of the inverse of the function to be tested and said input does not yield an expected result.
Dependencies are inferred from the claim text.