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US 6,480,439 B2Granted
Semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsHiroto Tokutome, Yutaka Ikeda
Life of this patent
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Abstract
Consuming current must be reduced in each operation state of a semiconductor device which operates in synchronized with an external clock signal. However, in each operation state, for satisfying the stability of an operation and a speedup, the suppression of consuming current has been performed under difficult circumstances. For solving this problem, a clock generation circuit generating an internal clock signal based on an external clock signal is activated during a specific time period when a clock synchronization circuit is in a state of inactivation.
Claims21
A semiconductor device comprising:
- a clock generation unit generating an internal clock signal based on an external clock signal, said clock generation unit including a delay locked loop circuit;
- a clock synchronization unit adapted to operate in synchronization with the internal clock signal;
- and
- a control unit adapted to activate the delay locked loop circuit for a specific time period interposed between inactivation periods of the delay locked loop circuit in an inactivation state of the clock synchronization unit.
1 more element
Dependencies are inferred from the claim text.