Twisted global column decoder
AssigneeMicron Technology, Inc.
InventorBrian M. Shirley
Life of this patent
Estimating the term…
Abstract
Adjacent global column decode lines in a dynamic random access memory (DRAM) are twisted in combination with a complex twist of digit lines such that one global column decoder line provides access to four non-adjacent digit line pairs. The four non-adjacent digit pairs are routed to external pins, allowing data from each of the pairs to be read or written simultaneously. Further, I/O switches which are located between the twisted global column decoder lines are coupled to outside pairs of the twisted digit lines, and the I/O switches which are located outside the twisted global column decoder lines are coupled to inside ones of the complex twisted digit lines.
Claims32
A memory array comprising:
- at least four digit line pairs, wherein the at least four digit line pairs are non-adjacent;
- and
- at least one twisted global column decode line so as to provide access to the at least four digit line pairs.
A memory array comprising:
- at least four digit line pairs, wherein the at least four digit line pairs are non-adjacent, wherein the at least four digit line pairs are routed to external pins so as to allow data from the at least four digit line pairs to be read or written contemporaneously;
- and
- at least one twisted global column decode line so as to provide access to the at least four digit line pairs.
A memory array comprising:
- a plurality of memory cells having digit lines, wherein a pair of the digit lines are twisted from inside to outside so as to provide that digit lines from the plurality of memory cells are non-adjacent;
- and
- at least one twisted global column decode line so as to provide access to the digit lines.
A memory array comprising:
- a plurality of memory cells having digit lines, wherein a pair of the digit lines are twisted from inside to outside so as to provide that digit lines from the plurality of memory cells are non-adjacent, wherein at least four digit line pairs are routed to external pins so as to allow data from the at least four digit line pairs to be read or written contemporaneously;
- and
- at least one twisted global column decode line so as to provide access to the digit lines.
A memory array comprising:
- a plurality of memory cells having digit lines, wherein a pair of the digit lines are twisted using a complex twist from inside to outside so as to provide that digit lines from the plurality of memory cells are non-adjacent;
- and
- at least one twisted global column decode line so as to provide access to the digit lines.
A memory array comprising:
- a plurality of memory cells having digit lines, wherein a pair of the digit lines are twisted using a complex twist from inside to outside so as to provide that digit lines from the plurality of memory cells are non-adjacent, wherein at least four digit line pairs are routed to external pins so as to allow data from the at least four digit line pairs to be read or written contemporaneously;
- and
- at least one twisted global column decode line so as to provide access to the digit lines.
A memory array comprising:
- a plurality of I/O switches;
- a plurality of memory cells having digit lines, wherein a pair of the digit lines are twisted about a point halfway between the plurality of I/O switches from inside to outside so as to provide that digit lines from the plurality of memory cells are non-adjacent;
- and
- at least one twisted global column decode line so as to provide access to the digit lines.
A memory array comprising:
- a plurality of I/O switches;
- a plurality of memory cells having digit lines, wherein a pair of the digit lines are twisted about a point halfway between the plurality of I/O switches from inside to outside so as to provide that digit lines from the plurality of memory cells are non-adjacent, wherein at least four digit line pairs are routed to external pins so as to allow data from the at least four digit line pairs to be read or written contemporaneously;
- and
- at least one twisted global column decode line so as to provide access to the digit lines.
Dependencies are inferred from the claim text.