A/D converter with higher speed and accuracy and lower power consumption
AssigneeFujitsu Limited
InventorsMasato Yoshioka, Sanroku Tsukamoto
Life of this patent
Estimating the term…
Abstract
An A/D converter comprises: a differential amplifier row for amplifying differential voltages between an analog input voltage and reference voltages; a first sample/hold circuit row for sampling/holding the individual differential voltages amplified; a second sample/hold circuit having a pair of second and third sample/hold circuits connected in parallel to each output of the first sample/hold circuit row, thereby performing alternate sampling; a plurality of comparators for determining whether the individual differential voltages held by the first sample/hold circuit row are positive or negative; and an encoder for outputting digital code corresponding to the outputs of the comparators.
Claims24
An A/D converter comprising:
- a reference voltage generating circuit for generating a plurality of reference voltages;
- a differential amplifier row including a plurality of differential amplifiers for receiving an analog input voltage and said reference voltages, amplifying differential voltages between said analog input voltage and said reference voltages and outputting the resultant;
- a first sample/hold circuit row including a plurality of first sample/hold circuits for sampling/holding said amplified differential voltages;
- a second sample/hold circuit row for performing interleaving operations, having a pair of second and third sample/hold circuits connected to said first sample/hold circuits;
- a first selector row including a plurality of selectors for selecting the output of said second sample/hold circuits and said third sample/hold circuits;
- a first comparator row including a plurality of comparators for determining a polarity of said amplified differential voltages;
- and
- a first encoder for outputting digital code corresponding to the output of said first comparator row.
A sample/hold circuit comprising:
- a reference voltage generating circuit for generating a plurality of reference voltages;
- a differential amplifier row including a plurality of differential amplifiers for receiving an analog input voltage and said reference voltages, amplifying differential voltages between said analog input voltage and said reference voltages, and outputting the resultant;
- a first sample/hold circuit row including a plurality of first sample/hold circuits for sampling/holding said amplified differential voltages;
- a second sample/hold circuit row for performing interleaving operations, having a pair of second and third sample/hold circuits connected to said first sample/hold circuits;
- and
- a first selector row including a plurality of selectors for selecting the output of said second sample/hold circuits and said third sample/hold circuits.
Dependencies are inferred from the claim text.